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100336 Datasheet(PDF) 5 Page - Fairchild Semiconductor |
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100336 Datasheet(HTML) 5 Page - Fairchild Semiconductor |
5 / 14 page 5 www.fairchildsemi.com Commercial Version (Continued) DIP AC Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND Note 5: The propagation delay specified is for single output switching. Delays may vary up to 250 ps with multiple outputs switching. Symbol Parameter TC = 0°CTC = +25°CTC = +85°C Units Conditions MinMax MinMax Min Max fSHIFT Shift Frequency 300 300 300 MHz Figures 2, 3 tPLH Propagation Delay 1.00 2.00 1.00 2.00 1.00 2.00 ns Figures 1, 3 tPHL CP to Qn, Qn (Note 5) tPLH Propagation Delay 2.10 3.50 2.10 3.50 2.10 3.70 ns Figures 1, 7, 8 tPHL CP to TC (Shift) (Note 5) tPLH Propagation Delay 2.40 4.40 2.40 4.40 2.60 4.70 ns Figures 1, 9 tPHL CP to TC (Count) (Note 5) tPLH Propagation Delay 1.40 2.50 1.40 2.50 1.50 2.60 ns Figures 1, 4 tPHL MR to Qn, Qn (Note 5) tPLH Propagation Delay 2.80 5.10 2.90 5.20 3.10 5.50 ns Figures 1, 12 tPHL MR to TC (Count) (Note 5) tPHL Propagation Delay 2.40 4.00 2.40 4.00 2.50 4.10 ns Figures 1, 10, 11 MR to TC (Shift) (Note 5) tPLH Propagation Delay 1.80 3.10 1.80 3.10 1.90 3.30 ns tPHL D0/CET to TC Figures 1, 5 tPLH Propagation Delay 1.90 4.10 1.90 4.10 2.10 4.40 ns (Note 5) tPHL Sn to TC tTLH Transition Time 0.35 1.20 0.35 1.20 0.35 1.20 ns Figures 1, 3 tTHL 20% to 80%, 80% to 20% tS Setup Time D3 1.00 1.00 1.00 Pn 1.50 1.50 1.50 D0/CET 1.30 1.30 1.30 ns Figures 6, 4 CEP 1.40 1.40 1.40 Sn 3.40 3.40 3.40 MR (Release Time) 2.60 2.60 2.60 tH Hold Time D3 0.40 0.40 0.40 Pn 0.30 0.30 0.30 ns Figure 6 D0/CET 0.30 0.30 0.30 CEP 0.20 0.20 0.20 Sn 0.10 0.10 0.10 tPW(H) Pulse Width HIGH 2.00 2.00 2.00 ns Figures 3, 4 CP, MR |
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