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74AC174 Datasheet(PDF) 2 Page - Fairchild Semiconductor |
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74AC174 Datasheet(HTML) 2 Page - Fairchild Semiconductor |
2 / 9 page www.fairchildsemi.com 2 Functional Description The AC/ACT174 consists of six edge-triggered D-type flip- flops with individual D inputs and Q outputs. The Clock (CP) and Master Reset (MR) are common to all flip-flops. Each D input’s state is transferred to the corresponding flip- flop’s output following the LOW-to-HIGH Clock (CP) transi- tion. A LOW input to the Master Reset (MR) will force all outputs LOW independent of Clock or Data inputs. The AC/ ACT174 is useful for applications where the true output only is required and the Clock and Master Reset are com- mon to all storage elements. Truth Table H = HIGH Voltage Level L = LOW Voltage Level = LOW-to-HIGH Transition X = Immaterial Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Inputs Output MR CP D Q LX X L H HH H LL HL X Q |
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Similar Description - 74AC174 |
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