© 1999 Fairchild Semiconductor Corporation

DS009920

www.fairchildsemi.com

November 1988

Revised November 1999

74AC74 • 74ACT74

Dual D-Type Positive Edge-Triggered Flip-Flop

General Description

The AC/ACT74 is a dual D-type flip-flop with Asynchronous

Clear and Set inputs and complementary (Q, Q) outputs.

Information at the input is transferred to the outputs on the

positive edge of the clock pulse. Clock triggering occurs at

a voltage level of the clock pulse and is not directly related

to the transition time of the positive-going pulse. After the

Clock Pulse input threshold voltage has been passed, the

Data input is locked out and information present will not be

transferred to the outputs until the next rising edge of the

Clock Pulse input.

Asynchronous Inputs:

Clear and Set are independent of clock

HIGH

Features

s Output source/sink 24 mA

s ACT74 has TTL-compatible inputs

Ordering Code:

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Connection Diagram

Pin Descriptions

FACT

 is a trademark of Fairchild Semiconductor Corporation.

Order Number

Package Number

Package Description

74AC74SC

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body

74AC74SJ

M14D

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74AC74MTC

MTC14

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74AC74PC

N14A

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

74ACT74SC

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body

74ACT74SJ

M14D

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74ACT74MTC

MTC14

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74ACT74PC

N14A

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Pin Names

Description

Data Inputs

Clock Pulse Inputs

Direct Clear Inputs

Direct Set Inputs

Outputs