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L4B Datasheet(PDF) 4 Page - NXP Semiconductors

Part # L4B
Description  Low-voltage 8-bit I2C-bus and SMBus low power I/O port with interrupt, weak pull-up and Agile I/O
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

L4B Datasheet(HTML) 4 Page - NXP Semiconductors

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PCAL9554B_PCAL9554C
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 10 December 2012
4 of 42
NXP Semiconductors
PCAL9554B; PCAL9554C
Low-voltage 8-bit I2C-bus/SMBus low power I/O port
5.
Pinning information
5.1 Pinning
5.2 Pin description
[1]
All I/O are configured as input at power-on.
[2]
HVQFN16 package die supply ground is connected to both the VSS pin and the exposed center pad. The
VSS pin must be connected to supply ground for proper device operation. For enhanced thermal, electrical,
and board-level performance, the exposed pad needs to be soldered to the board using a corresponding
thermal pad on the board, and for proper heat conduction through the board thermal vias need to be
incorporated in the printed-circuit board in the thermal pad region.
Fig 2.
Pin configuration for TSSOP16
Fig 3.
Pin configuration for HVQFN16
VDD
SDA
SCL
INT
P7
P6
P5
P4
A0
A1
A2
P0
P1
P2
P3
VSS
PCAL9554BPW
PCAL9554CPW
002aah205
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
002aah206
Transparent top view
P2
P6
P1
P7
P0
INT
SCL
4
9
3
10
2
11
1
12
terminal 1
index area
A2
PCAL9554BBS
PCAL9554CBS
Table 3.
Pin description
Symbol
Pin
Description
TSSOP16
HVQFN16
A0
1
15
address input 0
A1
2
16
address input 1
A2
3
1
address input 2
P0[1]
4
2
Port P input/output 0
P1[1]
5
3
Port P input/output 1
P2[1]
6
4
Port P input/output 2
P3[1]
7
5
Port P input/output 3
VSS
86[2]
supply ground
P4[1]
9
7
Port P input/output 4
P5[1]
10
8
Port P input/output 5
P6[1]
11
9
Port P input/output 6
P7[1]
12
10
Port P input/output 7
INT
13
11
interrupt output (open-drain)
SCL
14
12
serial clock line
SDA
15
13
serial data line
VDD
16
14
supply voltage


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