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74ACTQ841 Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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74ACTQ841 Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 7 page March 1990 Revised November 1998 © 1999 Fairchild Semiconductor Corporation DS010688.prf www.fairchildsemi.com 74ACTQ841 Quiet Series ™ 10-Bit Transparent Latch with 3-STATE Outputs General Description The ACTQ841 bus interface latch is designed to eliminate the extra packages required to buffer existing latches and provide extra data width for wider address/data paths or buses carrying parity. The 841 is a 10-bit transparent latch, a 10-bit version of the 373. The ACTQ841 utilizes Fairchild Quiet Series ™ technology to guarantee quiet output switch- ing and improved dynamic threshold performance. FACT Quiet Series features GTO ™ output control and undershoot corrector in addition to a split ground bus for superior per- formance. Features s Guaranteed simultaneous switching noise level and dynamic threshold performance s Guaranteed pin-to-pin skew AC performance s Inputs and outputs on opposite sides of package allow easy interface with microprocessors s Improved latch-up immunity s Outputs source/sink 24 mA s Has TTL-compatible inputs Ordering Code: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols Connection Diagram Pin Assignment for DIP and SOIC Pin Descriptions FACT ™, Quiet Series™, FACT Quiet Series™ and GTO™ are trademarks of Fairchild Semiconductor Corporation. Order Number Package Number Package Description 74ACTQ841SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body 74ACTQ841SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC, MS-100, 0.300” Wide Pin Names Description D0–D9 Data Inputs O0–O9 3-STATE Outputs OE Output Enable LE Latch Enable |
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