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74LVTH652MTC Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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74LVTH652MTC Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 8 page © 2000 Fairchild Semiconductor Corporation DS012018 www.fairchildsemi.com April 2000 Revised April 2000 74LVTH652 Low Voltage Octal Transceiver/Register with 3-STATE Outputs General Description The LVTH652 consists of bus transceiver circuits with D- type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to HIGH logic level. Output Enable pins (OEAB, OEBA) are pro- vided to control the transceiver function. (See Functional Description). The LVTH652 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs. This octal transceiver/register is designed for low-voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVTH652 is fabri- cated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining low power dissipation. Features s Input and output interface capability to systems at 5V VCC s Bushold data inputs eliminate the need for external pull- up resistors to hold unused inputs s Live insertion/extraction permitted s Power Up/Down high impedance provides glitch-free bus loading s Outputs source/sink −32 mA/+64 mA s Functionally compatible with the 74 series 652 s Latch-up performance exceeds 500 mA Ordering Code: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols IEEE/IEC Order Number Package Number Package Description 74LVTH652WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide 74LVTH652MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide |
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