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74LVX374M Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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74LVX374M Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 6 page © 2005 Fairchild Semiconductor Corporation DS011612 www.fairchildsemi.com October 1993 Revised April 2005 74LVX374 Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs General Description The LVX374 is a high-speed, low-power octal D-type flip- flop featuring separate D-type inputs for each flip-flop and 3-STATE outputs for bus-oriented applications. A buffered Clock (CP) and Output Enable (OE) are common to all flip- flops. The inputs tolerate up to 7V allowing interface of 5V systems to 3V systems. Features s Input voltage translation from 5V to 3V s Ideal for low power/low noise 3.3V applications s Guaranteed simultaneous switching noise level and dynamic threshold performance Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Logic Symbols IEEE/IEC Connection Diagram Pin Descriptions Order Number Package Number Package Description 74LVX374M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74LVX374SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVX374MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pin Names Description D0–D7 Data Inputs CP Clock Pulse Input OE 3-STATE Output Enable Input O0–O7 3-STATE Outputs |
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