© 2005 Fairchild Semiconductor Corporation

DS500159

www.fairchildsemi.com

March 2000

Revised June 2005

74VCX164245

Low Voltage 16-Bit Dual Supply Translating Transceiver

with 3-STATE Outputs

General Description

The VCX164245 is a dual supply, 16-bit translating trans-

ceiver that is designed for two way asynchronous commu-

nication between busses at different supply voltages by

providing true signal translation. The supply rails consist of

for proper device operation.) This dual supply design

allows for translation from 1.8V to 2.5V busses to busses at

a higher potential, up to 3.3V.

The Transmit/Receive (T/R) input determines the direction

of data flow. Transmit (active-HIGH) enables data from A

Ports to B Ports. Receive (active-LOW) enables data from

B Ports to A Ports. The Output Enable (OE) input, when

HIGH, disables both A and B Ports by placing them in a

High-Z condition. The A Port interfaces with the lower volt-

age bus (1.8V

 2.5V). The B Port interfaces with the

higher voltage bus (2.7V

 3.3V). Also the VCX164245 is

The 74VCX164245 is suitable for mixed voltage applica-

tions such as notebook computers using a 1.8V CPU and

3.3V peripheral components. It is fabricated with an

Advanced CMOS technology to achieve high speed opera-

tion while maintaining low CMOS power dissipation.

Features

s Bidirectional interface between busses ranging from

1.65V to 3.6V

s Supports Live Insertion and Withdrawal (Note 1)

s Uses patented noise/EMI reduction circuitry

s Functionally compatible with 74 series 16245

s Latchup performance exceeds 300 mA

s ESD performance:

Human Body Model

!2000V

Machine model

!200V

s Also packaged in plastic Fine-Pitch Ball Grid Array

(FBGA)

Note 1: To ensure the high impedance state during power up or power

value of the resistor is determined by the current sourcing capability of the

driver.

Ordering Code:

Note 2: Ordering Code “G” indicates Trays.

Note 3: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Diagram

Order Number

Package Number

Package Description

74VCX164245G

(Note 2)(Note 3)

BGA54A

54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

74VCX164245MTD

(Note 3)

MTD48

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide