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74VHC163 Datasheet(HTML) 5 Page - Fairchild Semiconductor

Part No. 74VHC163
Description  4-Bit Binary Counter with Synchronous Clear
Download  10 Pages
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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74VHC163 Datasheet(HTML) 5 Page - Fairchild Semiconductor

 
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AC Electrical Characteristics
Note 4: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average
operating current can be obtained by the equation: ICC (opr) = CPD * VCC * fIN + ICC.
When the outputs drive a capacitive load, total current consumption is the sum of CPD, and ∆ICC which is obtained from the following formula:
CQ0–CQ3 and CTC are the capacitances at Q0–Q3 and TC, respectively. FCP is the input frequency of the CP.
Symbol
Parameter
VCC
TA = 25°CTA = −40° to +85°C
Units
Conditions
(V)
Min
Typ
Max
Min
Max
tPLH
Propagation Delay
3.3
± 0.3
8.3
12.8
1.0
15.0
ns
CL = 15 pF
tPHL
Time (CP–Qn)
10.8
16.3
1.0
18.5
CL = 50 pF
5.0
± 0.5
4.9
8.1
1.0
9.5
ns
CL = 15 pF
6.4
10.1
1.0
11.5
CL = 50 pF
tPLH
Propagation Delay
3.3
± 0.3
8.7
13.6
1.0
16.0
ns
CL = 15 pF
tPHL
Time (CP–TC, Count)
11.2
17.1
1.0
19.5
CL = 50 pF
5.0
± 0.5
4.9
8.1
1.0
9.5
ns
CL = 15 pF
6.4
10.1
1.0
11.5
CL = 50 pF
tPLH
Propagation Delay
3.3
± 0.3
11.0
17.2
1.0
20.0
ns
CL = 15 pF
tPHL
Time (CP–TC, Load)
13.5
20.7
1.0
23.5
CL = 50 pF
5.0
± 0.5
6.2
10.3
1.0
12.0
ns
CL = 15 pF
7.7
12.3
1.0
14.0
CL = 50 pF
tPLH
Propagation Delay
3.3
± 0.3
7.5
12.3
1.0
14.5
ns
CL = 15 pF
tPHL
Time (CET–TC)
10.5
15.8
1.0
18.0
CL = 50 pF
5.0
± 0.5
4.9
8.1
1.0
9.5
ns
CL = 15 pF
6.4
10.1
1.0
11.5
CL = 50 pF
fMAX
Maximum Clock
3.3
± 0.3
80
130
70
MHz
CL = 15 pF
Frequency
55
85
50
CL = 50 pF
5.0
± 0.5
135
185
115
MHz
CL = 15 pF
95
125
85
CL = 50 pF
CIN
Input Capacitance
4
10
10
pF
VCC = Open
CPD
Power Dissipation
23
pF
(Note 4)
Capacitance


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