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W25Q128FVTIG Datasheet(HTML) 38 Page - Winbond

Part No. W25Q128FVTIG
Description  SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI
Download  97 Pages
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Maker  WINBOND [Winbond]
Homepage  http://www.winbond.com
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W25Q128FVTIG Datasheet(HTML) 38 Page - Winbond

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W25Q128FV
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8.2.9
Fast Read Quad Output (6Bh)
The Fast Read Quad Output (6Bh) instruction is similar to the Fast Read Dual Output (3Bh) instruction
except that data is output on four pins, IO0, IO1, IO2, and IO3. The Quad Enable (QE) bit in Status
Register-2 must be set to 1 before the device will accept the Fast Read Quad Output Instruction. The Fast
Read Quad Output Instruction allows data to be transferred at four times the rate of standard SPI devices.
The Fast Read Quad Output instruction can operate at the highest possible frequency of FR (see AC
Electrical Characteristics). This is accomplished by adding eight “dummy” clocks after the 24-bit address
as shown in Figure 20. The dummy clocks allow the device's internal circuits additional time for setting up
the initial address. The input data during the dummy clocks is “don’t care”. However, the IO pins should be
high-impedance prior to the falling edge of the first data out clock.
/CS
CLK
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Instruction (6Bh)
High Impedance
8
9
10
28
29
30
32
33
34
35
36
37
38
39
4
0
24-Bit Address
23
22
21
3
2
1
0
*
31
31
/CS
CLK
Dummy Clocks
0
40
41
42
43
44
45
46
47
5
1
High Impedance
4
5
Byte 1
High Impedance
High Impedance
6
2
7
3
High Impedance
6
7
High Impedance
4
0
5
1
6
2
7
3
4
0
5
1
6
2
7
3
4
0
5
1
6
2
7
3
Byte 2
Byte 3
Byte 4
IO
0 switches from
Input to Output
IO
0
IO
1
IO
2
IO
3
IO
0
IO
1
IO
2
IO
3
= MSB
*
Figure 20. Fast Read Quad Output Instruction (SPI Mode only)


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