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W9725G6KB25A Datasheet(HTML) 2 Page - Winbond

Part No. W9725G6KB25A
Description  DLL aligns DQ and DQS transitions with clock, Data masks (DM) for write data, Write Data Mask
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Maker  WINBOND [Winbond]
Homepage  http://www.winbond.com
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W9725G6KB25A Datasheet(HTML) 2 Page - Winbond

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W9725G6KB
Publication Release Date: Sep. 03, 2012
- 2 -
Revision A03
8.4.1.1
Examples of posted CAS operation......................................................................23
8.4.2
Burst mode operation.......................................................................................................24
8.4.3
Burst read mode operation...............................................................................................25
8.4.4
Burst write mode operation ..............................................................................................25
8.4.5
Write data mask ...............................................................................................................26
8.5
Burst Interrupt .....................................................................................................................................26
8.6
Precharge operation............................................................................................................................27
8.6.1
Burst read operation followed by precharge.....................................................................27
8.6.2
Burst write operation followed by precharge ....................................................................27
8.7
Auto-precharge operation ...................................................................................................................27
8.7.1
Burst read with Auto-precharge........................................................................................28
8.7.2
Burst write with Auto-precharge .......................................................................................28
8.8
Refresh Operation...............................................................................................................................29
8.9
Power Down Mode..............................................................................................................................29
8.9.1
Power Down Entry ...........................................................................................................30
8.9.2
Power Down Exit..............................................................................................................30
8.10
Input clock frequency change during precharge power down .............................................................30
9.
OPERATION MODE ...........................................................................................................................31
9.1
Command Truth Table ........................................................................................................................31
9.2
Clock Enable (CKE) Truth Table for Synchronous Transitions............................................................32
9.3
Data Mask (DM) Truth Table...............................................................................................................32
9.4
Function Truth Table ...........................................................................................................................33
9.5
Simplified Stated Diagram...................................................................................................................36
10.
ELECTRICAL CHARACTERISTICS ...................................................................................................37
10.1
Absolute Maximum Ratings.................................................................................................................37
10.2
Operating Temperature Condition.......................................................................................................37
10.3
Recommended DC Operating Conditions ...........................................................................................38
10.4
ODT DC Electrical Characteristics ......................................................................................................38
10.5
Input DC Logic Level...........................................................................................................................38
10.6
Input AC Logic Level ...........................................................................................................................38
10.7
Capacitance ........................................................................................................................................39
10.8
Leakage and Output Buffer Characteristics ........................................................................................39
10.9
DC Characteristics ..............................................................................................................................40
10.10
IDD Measurement Test Parameters ..........................................................................................42
10.11
AC Characteristics .....................................................................................................................43
10.11.1
AC Characteristics and Operating Condition for -18 speed grade ...................................43
10.11.2
AC Characteristics and Operating Condition for -25/25I/25A/25K/-3 speed grade...........45
10.12
AC Input Test Conditions...........................................................................................................66
10.13
Differential Input/Output AC Logic Levels ..................................................................................66
10.14
AC Overshoot / Undershoot Specification .................................................................................67
10.14.1
AC Overshoot / Undershoot Specification for Address and Control Pins: ........................67
10.14.2
AC Overshoot / Undershoot Specification for Clock, Data, Strobe and Mask pins:..........67
11.
TIMING WAVEFORMS .......................................................................................................................68


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