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W25Q128FVEIG Datasheet(HTML) 37 Page - Winbond

Part No. W25Q128FVEIG
Description  SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI
Download  97 Pages
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Maker  WINBOND [Winbond]
Homepage  http://www.winbond.com
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W25Q128FVEIG Datasheet(HTML) 37 Page - Winbond

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W25Q128FV
Publication Release Date: October 01, 2012
- 36 -
Revision D
8.2.8 Fast Read Dual Output (3Bh)
The Fast Read Dual Output (3Bh) instruction is similar to the standard Fast Read (0Bh) instruction except
that data is output on two pins; IO0 and IO1. This allows data to be transferred at twice the rate of standard
SPI devices. The Fast Read Dual Output instruction is ideal for quickly downloading code from Flash to
RAM upon power-up or for applications that cache code-segments to RAM for execution.
Similar to the Fast Read instruction, the Fast Read Dual Output instruction can operate at the highest
possible frequency of FR (see AC Electrical Characteristics). This is accomplished by adding eight
“dummy” clocks after the 24-bit address as shown in Figure 18. The dummy clocks allow the device's
internal circuits additional time for setting up the initial address. The input data during the dummy clocks is
“don’t care”. However, the IO0 pin should be high-impedance prior to the falling edge of the first data out
clock.
/CS
CLK
DI
(IO
0)
DO
(IO
1)
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Instruction (3Bh)
High Impedance
8
9
10
28
29
30
32
33
34
35
36
37
38
39
6
4
2
0
24-Bit Address
23
22
21
3
2
1
0
*
*
31
31
/CS
CLK
DI
(IO
0)
DO
(IO
1)
Dummy Clocks
0
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
7
5
3
1
High Impedance
6
4
2
0
7
5
3
1
6
4
2
0
7
5
3
1
6
4
2
0
7
5
3
1
IO
0 switches from
Input to Output
6
7
Data Out 1
* Data Out 2
* Data Out 3
* Data Out 4
= MSB
*
Figure 18. Fast Read Dual Output Instruction (SPI Mode only)


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