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W25Q128FVEIG Datasheet(HTML) 59 Page - Winbond

Part No. W25Q128FVEIG
Description  SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI
Download  97 Pages
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Maker  WINBOND [Winbond]
Homepage  http://www.winbond.com
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W25Q128FVEIG Datasheet(HTML) 59 Page - Winbond

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W25Q128FV
Publication Release Date: October 01, 2012
- 58 -
Revision D
8.2.23 Power-down (B9h)
Although the standby current during normal operation is relatively low, standby current can be further
reduced with the Power-down instruction. The lower power consumption makes the Power-down
instruction especially useful for battery powered applications (See ICC1 and ICC2 in AC Characteristics).
The instruction is initiated by driving the /CS pin low and shifting the instruction code “B9h” as shown in
Figure 37a & 37b.
The /CS pin must be driven high after the eighth bit has been latched. If this is not done the Power-down
instruction will not be executed. After /CS is driven high, the power-down state will entered within the time
duration of tDP (See AC Characteristics). While in the power-down state only the Release Power-down /
Device ID (ABh) instruction, which restores the device to normal operation, will be recognized. All other
instructions are ignored. This includes the Read Status Register instruction, which is always available
during normal operation. Ignoring all but one instruction makes the Power Down state a useful condition
for securing maximum write protection. The device always powers-up in the normal operation with the
standby current of ICC1.
/CS
CLK
DI
(IO
0)
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Instruction (B9h)
Mode 0
Mode 3
tDP
Power-down current
Stand-by current
Figure 37a. Deep Power-down Instruction (SPI Mode)
/CS
CLK
Mode 0
Mode 3
0
1
IO
0
IO
1
IO
2
IO
3
B9h
Instruction
Mode 0
Mode 3
tDP
Power-down current
Stand-by current
Figure 37b. Deep Power-down Instruction (QPI Mode)


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