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74VHC164SJ Datasheet(PDF) 4 Page - Fairchild Semiconductor |
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74VHC164SJ Datasheet(HTML) 4 Page - Fairchild Semiconductor |
4 / 8 page www.fairchildsemi.com 4 AC Electrical Characteristics Note 5: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained from the equation: ICC (opr.) CPD * VCC * fIN ICC. AC Operating Requirements Note 6: VCC is 3.3 r 0.3V or 5.0 r 0.5V Symbol Parameter VCC (V) TA 25qCTA 40qC to 85qC Units Conditions Min Typ Max Min Max fMAX Maximum Clock Frequency 3.3 r 0.3 80 125 65 MHz CL 15 pF, RL 1k 50 75 45 CL 50 pF, RL 1k 5.0 r 0.5 125 175 105 MHz CL 15 pF, RL 1k 85 115 75 CL 50 pF, RL 1k tPLH Propagation Delay 3.3 r 0.3 8.4 12.8 1.0 15.0 ns CL 15 pF, RL 1k tPHL Time (CP–Qn) 10.9 16.3 1.0 18.5 CL 50 pF, RL 1k 5.0 r 0.5 5.8 9.0 1.0 10.5 ns CL 15 pF, RL 1k 7.3 11.0 1.0 12.5 CL 50 pF, RL 1k tPHL Propagation Delay 3.3 r 0.3 8.3 12.8 1.0 15.0 ns CL 15 pF, RL 1k Time (MR–Qn) 10.8 16.3 1.0 18.5 CL 50 pF, RL 1k 5.0 r 0.5 5.2 8.6 1.0 10.0 ns CL 15 pF, RL 1k 6.7 10.6 1.0 12.0 CL 50 pF, RL 1k CIN Input Capacitance 4 10 10 pF VCC Open CPD Power Dissipation 76 pF (Note 5) Capacitance Symbol Parameter VCC (V) (Note 6) TA 25qCTA 40qC to 85qC Units Typ Guaranteed Minimum tW(L) Minimum Pulse Width (CP) 3.3 5.0 5.0 ns tW(H) 5.0 5.0 5.0 tW(L) Minimum Pulse Width (MR) 3.3 5.0 5.0 ns 5.0 5.0 5.0 tS Minimum Setup Time 3.3 5.0 6.0 ns 5.0 4.5 4.5 tH Minimum Hold Time 3.3 0.0 0.0 ns 5.0 1.0 1.0 tREC Minimum Removal Time (MR) 3.3 2.5 2.5 ns 5.0 2.5 2.5 |
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