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DAC1653Q Datasheet(HTML) 24 Page - Integrated Device Technology

Part No. DAC1653Q
Description  Quad 16-bit DAC: 10 Gbps JESD204B interface: up to 1.50
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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DAC1653Q Datasheet(HTML) 24 Page - Integrated Device Technology

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DAC1653Q/DAC1658Q
© IDT 2013. All rights reserved.
Advance data sheet
Rev. 1.03 — 13 May 2013
24 of 101
Integrated Device Technology
DAC1653Q/DAC1658Q
Quad 16-bit DAC: 10 Gbps JESD204B interface; up to 1.50 Gsps
can be programmed to act as an input or an output regarding the mode expected for the
system (Normal mode, Daisy chain mode). The device also enables independent link
reinitialization.
The DAC165xQ generates four complementary current outputs on pins
IOUTA_P/IOUTA_N and IOUTB_P/IOUTB_N, IOUTC_P/IOUTC_N, and
IOUTD_P/IOUTD_N corresponding to channel 'A', ‘B’, ‘C’, and 'D', respectively, providing
a nominal full-scale output current of 20 mA. An internal reference is available for the
reference current which is externally adjustable using pin VIRES.
The DAC165xQ requires configuration before operating. It features an SPI slave interface
to access the internal registers. Some of these registers also provide information about
the JESD204B interface status. Optionally, an interrupt capability can be programmed
using those registers to ensure ease of use of the device.
Because of the JESD204B standardization, the DAC165xQ does not require any
adjustment from the Transmit Logic Device (TLD) to capture the input data streams.
Some autolock features can be monitored using the SPI registers.
The DAC165xQ supports the following LMF configuration as described in the JESD204B
standard.
[1]
S is the number of samples per frame.
[2]
HD is the High-Density bit as described in the JESD204B specification.
A new IDT auto-mute feature enables switching off of the RF output signal as a result of
various internal events occurring.
A signal level detector allows auto-muting of the DAC outputs if they exceed the detection
limit.
The DAC165xQ requires supplies of 2.5 V or 3.3 V and 1.2 V. The 1.2 V supply has
separate digital and analog power supply pins .
Table 10.
LMF configuration if DAC165xQ configures in dual JEDS204B links
Link configuration
L-M-F
S[1]
HD[2]
dual link
1-2-4
1
0
dual link
2-2-2
1
0
dual link
4-2-2
2
0
dual link
4-2-1
1
1
single link
2-4-4
1
0
single link
4-2-2
1
0
single link
8-4-2
2
0
single link
8-4-1
1
1


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