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DAC1653Q Datasheet(HTML) 32 Page - Integrated Device Technology

Part No. DAC1653Q
Description  Quad 16-bit DAC: 10 Gbps JESD204B interface: up to 1.50
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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DAC1653Q Datasheet(HTML) 32 Page - Integrated Device Technology

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DAC1653Q/DAC1658Q
© IDT 2013. All rights reserved.
Advance data sheet
Rev. 1.03 — 13 May 2013
32 of 101
Integrated Device Technology
DAC1653Q/DAC1658Q
Quad 16-bit DAC: 10 Gbps JESD204B interface; up to 1.50 Gsps
11.2.3 Interface DAC DSP block
This module is the interface between the data processing in the high-speed serial receiver
and the dual DAC core. The controls of the Digital Signal Processing (DSP) of the DAC
are specified to set up the interpolation filter, and enable or disable the various gains and
offsets of the data digital path. The data signals have already been processed by the
Digital Lane Processing . They are provided to this module through the Clock Domain
Interface . This module is clocked by the digital clock DCLK.
11.2.3.1 Input data format
After decoding in the high-speed serial receiver, the data representation can be specified
as binary offset coding or as two's complement coding using register CODING_XY_IQ .
11.2.3.2 Finite Impulse Response (FIR) filters
The DAC165xQ provides three interpolation filters described by their coefficients in
Table 15. The three interpolation FIR filters have a stop band attenuation of at least
80 dBc and a pass band ripple of less than 0.0005 dB.
The interpolation ratio can be set through register TX_CFG_XY .
The 'no interpolation' or '~
1' (quasi 1) mode is in fact a degenerated 2 interpolation
mode where the samples are repeated twice.
Block 0060h = DAC A/B
Block 0260h = DAC C/D
Block 0460h = All DACs
Fig 14. Interface DAC DSP overview
BLOCK 0060h/0260h/0460h: INTERFACE DAC DSP
LEVEL
DETECTOR
OFFSET X
DAC_X_OFFSET
DAC_LVL_DET_XY
INVERSE
SIN x / x
PHASE
CORRECTION
INTERPOLATION
FILTERS
INPUT DATA
FORMAT
CODING:
binary offset
two’s complement
INTERPOLATION:
~1 (sample repetition)
x2
x4
x8
INV_SINC_SEL_XY
LVL_DET_EN_XY
MINUS_3DB_XY
OFFSET Y
DAC_Y_OFFSET
DGAIN X
DAC_X_DGAIN
PH_CORR_XY
DGAIN Y
DAC_Y_DGAIN
DAC_X_DGAIN_EN
DAC_Y_DGAIN_EN
PH_CORR_EN_XY
NCO_ON_XY
SINGLE SIDE BAND
MODULATION (NCO)
NCO_LP_SEL_XY
NCO_FREQ_XY
NCO_PH_XY
MODULATION:
pos.up.sideband
pos.low.sideband
neg.up.sideband
neg.low.sideband
+
+
x2
Table 14.
Interpolation
Symbol
Access
Value
Description
INTERPOLATION[1:0]
R/W
interpolation
00
no interpolation/~
1 interpolation
01
2 interpolation
10
4 interpolation
11
8 interpolation


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