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DAC1653Q Datasheet(HTML) 33 Page - Integrated Device Technology |
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DAC1653Q Datasheet(HTML) 33 Page - Integrated Device Technology |
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DAC1653Q/DAC1658Q © IDT 2013. All rights reserved. Advance data sheet Rev. 1.03 — 13 May 2013 33 of 101 Integrated Device Technology DAC1653Q/DAC1658Q Quad 16-bit DAC: 10 Gbps JESD204B interface; up to 1.50 Gsps Remark: The INTERPOLATION setting must be coupled with the DCLK and WCLK clock configurations and with CDI mode . Fig 15. First stage half-band filter response (used in 2, 4, and 8 interpolation) Fig 16. Second stage half-band filter response (used in 2, 4, and 8 interpolation) NF (fs) 0 0.5 0.4 0.2 0.3 0.1 magnitude (dB) 0 -100 -20 -40 -80 -60 NF (fs) 0 0.5 0.4 0.2 0.3 0.1 magnitude (dB) 0 -100 -20 -40 -80 -60 |
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