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DAC1653Q Datasheet(HTML) 45 Page - Integrated Device Technology

Part No. DAC1653Q
Description  Quad 16-bit DAC: 10 Gbps JESD204B interface: up to 1.50
Download  101 Pages
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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DAC1653Q Datasheet(HTML) 45 Page - Integrated Device Technology

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DAC1653Q/DAC1658Q
© IDT 2013. All rights reserved.
Advance data sheet
Rev. 1.03 — 13 May 2013
45 of 101
Integrated Device Technology
DAC1653Q/DAC1658Q
Quad 16-bit DAC: 10 Gbps JESD204B interface; up to 1.50 Gsps
Mute rate
The time period used to decrease or increase the gains during a MUTE or DEMUTE state
is called mute rate. Each mute action category has its own mute rate available through the
registers ALARM_MRATE_XY, DATA_MRATE_XY, INCIDENT_MRATE_XY and
DIRECT_MRATE_XY.
Fig 22. Mute actions representation
1
0
1
0
1
0
1
0
1
2
sample at the output
of the digital at time t0
t0 + « mute_rate »
t0 + « mute_rate » + « wait_period »
t0 + « mute_rate » + « wait_period » + « mute_rate »
gain
control
gain
control
gain
control
IDLE
IDLE
MUTE
WAIT DEMUTE
no mute
soft mute
hold mute
hard mute
signals seen at the
output of the DAC
auto-mute
state machine
DAC digital latency
sample at the input
of the digital at time t0
sample at the output
of the digital at time t0
glitch
signal sent at the
input of the DAC
the « mute action » starts at
t0 on the output of the digital
a « mute event » is detected
at t0 at the input of the digital


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