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DAC1653Q Datasheet(HTML) 51 Page - Integrated Device Technology

Part No. DAC1653Q
Description  Quad 16-bit DAC: 10 Gbps JESD204B interface: up to 1.50
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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DAC1653Q Datasheet(HTML) 51 Page - Integrated Device Technology

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DAC1653Q/DAC1658Q
© IDT 2013. All rights reserved.
Advance data sheet
Rev. 1.03 — 13 May 2013
51 of 101
Integrated Device Technology
DAC1653Q/DAC1658Q
Quad 16-bit DAC: 10 Gbps JESD204B interface; up to 1.50 Gsps
Clocks internal configuration
The following registers must be specified to configure the DAC165xQ in Direct clocking
mode :
<tbd>
The final clock is referred to as the "DAC clock". This is the clock that is going directly to
the quad DAC core and is running at maximum speed. From this DAC clock two digital
clocks are derived: DCLK and WCLK.
DCLK is the digital clock used for all logic related to the Digital Signal Processing (DSP) of
the DAC. DCLK is automatically generated from the registers
PON_DAC_CORE_CFG_XY_0, INTERPOLATION_XY and CDI_MOD. Registers
DCLK_MON and DCLK_MON_RST can be used to monitor this automatic generation.
This flag can also raise the interrupt feature .
WCLK is the digital clock used for all logic related to the Digital Lane Processing (DLP) of
the input interface. This clock must be enabled by bit WCLK_PON_XY . The divider ratio
WCLK_DIV_SEL_XY must be specified using the following equation:
(16)
Where:
M stands for the number of DACs used inside the DAC165xQ (M = 1 or M = 2)
L stands for the number of serial input lanes used (L = 1, L = 2, or L = 4)
INTERPOLATION_XY stands for the interpolation factor specified in register
TX_CFG_XY .
Table 24 shows the results for nominal use cases (not exhaustive)
Table 24.
WCLK_DIV selection
LMF
configuration
Interpolation
ratio
WCLK/DAC
clock
WCLK_DIV_BYP WCLK_DIV_SEL
421 / 422
2
1/4
0
010
4
1/8
0
100
8
1/16
0
110
222
2
1/2
0
000
4
1/4
0
010
8
1/8
0
100
124
2
1
1
xxx
4
1/2
0
000
8
1/4
0
010
211
2
1/2
0
000
4
1/4
0
010
8
1/8
0
100
WCLK
DAC clock
-----------------------------
M
L INTERPOLATION _ XY

-----------------------------------------------------------------------------
=


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