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DAC1653Q Datasheet(HTML) 53 Page - Integrated Device Technology

Part No. DAC1653Q
Description  Quad 16-bit DAC: 10 Gbps JESD204B interface: up to 1.50
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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DAC1653Q Datasheet(HTML) 53 Page - Integrated Device Technology

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DAC1653Q/DAC1658Q
© IDT 2013. All rights reserved.
Advance data sheet
Rev. 1.03 — 13 May 2013
53 of 101
Integrated Device Technology
DAC1653Q/DAC1658Q
Quad 16-bit DAC: 10 Gbps JESD204B interface; up to 1.50 Gsps
11.3.1 Regulation
The DAC165xQ reference circuitry integrates an internal band gap reference voltage
which delivers a 0.7 V reference on the GAPOUT pin. Decouple pin GAPOUT using a
100 nF capacitor.
The reference current is generated via an external resistor of 560
 (1 %) connected to
VIRES.
Figure 30 shows the optimal configuration for temperature drift compensation because the
band gap reference voltage can be matched to the voltage across the feedback resistor.
The DAC current can also be adjusted by applying an external reference voltage to the
non-inverting input pin GAPOUT and disabling the internal band gap reference voltage
(bit BGAP_PON_XY).
11.3.2 Full-scale current adjustment
The default full-scale current (IO(fs)) is 20 mA. However, further adjustments, ranging from
8.1 mA to 34 mA, can be made to both DACs independently using the serial interface.
The settings applied to DAC_X_GAIN[9:0] define the full-scale current of DAC X:
(17)
The DAC_Y_GAIN[9:0] define the full-scale current of DAC Y:
(18)
11.4 Analog output
11.4.1 DAC1658Q: High common-mode output voltage
The device has four output channels, each producing two complementary current outputs,
which enable the reduction of even-order harmonics and noise. The pins are
IOUTA_P/IOUTA_N, IOUTB_P/IOUTB_N, IOUTC_P/IOUTC_N and IOUTD_P/IOUTD_N.
Connect these pins to ground (GND) using a load resistor RL to the 3.3 V analog power
supply (VDDA(3V3)).
Figure 31 shows the equivalent analog output circuit of one DAC. This circuit includes a
parallel combination of NMOS current sources and associated switches for each
segment.
Fig 30. Internal reference configuration
560 Ω (1 %)
100 nF
DAC
CURRENT
SOURCES
ARRAY
BAND GAP
REFERENCE
GAPOUT
AGND
AGND
VIRES
DAC
I Ofs
 A
8100 DAC_ X _GAIN [9:0] 25,3
+
=
I Ofs
 A
8100 DAC_Y _GAIN [9:0] 25,3
+
=


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