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DAC1653Q Datasheet(HTML) 13 Page - Integrated Device Technology

Part No. DAC1653Q
Description  Quad 16-bit DAC: 10 Gbps JESD204B interface: up to 1.50
Download  101 Pages
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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DAC1653Q Datasheet(HTML) 13 Page - Integrated Device Technology

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Power
Ptot
total power
dissipation
NCO off;
2 interpolation;; MDS off;
invsinc off, phase correction off
VDDA = 3.3 V; all VDDD = 1.2 V
fs = 983.04 Msps;
eight JESD204B lanes at
4.9152 Gbps
C
-
1486
-
-
1982
-
mW
fs = 1228.8 Msps;
eight JESD204B lanes at
6.144 Gbps
C
-
<tbd>
-
-
<tbd>
-
mW
fs = 1474.56 Msps;
eight JESD204B lanes at
7.3728 Gbps
C
-
1770
-
-
2166
-
mW
VDDA = 2.5 V; all VDDD = 1.2 V
fs = 983.04 Msps;
eight JESD204B lanes at
4.9152 Gbps
C
n.a.
-
1786
-
mW
fs = 1228.8 Msps;
eight JESD204B lanes at
6.144 Gbps
C
n.a.
-
<tbd>
-
mW
fs = 1474.56 Msps;
eight JESD204B lanes at
7.3728 Gbps
C
n.a.
-
1970
-
mW
full power-down
C
-
12
-
-
12
-
mW
Analog outputs (pins IOUTA_P, IOUTA_N, IOUTB_P, IOUTB_N)
IO(fs)
full-scale output
current
D
8.1
-
34
8.1
-
34
mA
IO(dc)
DC output
current
this DC offset is to be taken into
account into filter design and
component connection
D-
4
-
-
4
-
mA
Table 6.
Specific characteristics …continued
VDDA1V2 = 1.2 V; VDDD1V2 = 1.2 V; Typical values measured at Tamb = +25 C; RL = 50 ; IO(fs) = 20 mA; maximum sample rate used; no inverse (sinus x) / x; no
output correction; output level = 1 V (p-p); unless otherwise specified.
Symbol
Parameter
Conditions
Test DAC1658Q:
High common-mode
DAC1653Q:
Low common-mode
Unit
Min
Typ
Max
Min
Typ
Max


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