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DAC1658Q1G5NAGA Datasheet(HTML) 70 Page - Integrated Device Technology

Part No. DAC1658Q1G5NAGA
Description  Quad 16-bit DAC: 10 Gbps JESD204B interface: up to 1.50
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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DAC1658Q1G5NAGA Datasheet(HTML) 70 Page - Integrated Device Technology

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DAC1653Q/DAC1658Q
© IDT 2013. All rights reserved.
Advance data sheet
Rev. 1.03 — 13 May 2013
70 of 101
Integrated Device Technology
DAC1653Q/DAC1658Q
Quad 16-bit DAC: 10 Gbps JESD204B interface; up to 1.50 Gsps
As this interrupt controller is dedicated to the JESD204B serial interface the
INTR_MOD_XY bits must be specified according to the LMF configuration used in the
system.
[1]
The lane numbering refers to the logical lanes
[2]
Any mode can also be used for debug purposes.
[3]
The "HOLD_FLAG_CNT_EN_XY" feature is explained in .
Register INTR_DLP_XY is reinitialized when the bit INTR_RST_XY control is set to logic
1 .
The DLP events that can be monitored with the interrupt controller are programmable via
register INTR_EN_XY . Those events are related to the lanes specified by the
INTR_MOD_XY bits in register INTR_SER_CTRL_XY . They can be enabled by the
following bits:
INTR_EN_NIT_XY: A Not-In-Table (NIT) error has occurred on one of the lanes
INTR_EN_DISP_XY: A disparity error has occurred on one of the lanes
INTR_EN_KOUT_XY: K control characters have been detetected on one of the lanes
INTR_EN_KOUT_UNEXP_XY: An unexpected K control character has been detected
on one of the lanes
INTR_EN_K28_7_XY: A K28.7 symbol has been detected on one of the lanes
INTR_EN_K28_5_XY: A K28.5 symbol has been detected on one of the lanes
INTR_EN_K28_3_XY: A K28.3 symbol has been detected on one of the lanes
INTR_EN_MISC_XY: An event related to the INTR_MISC_EN_XY register has
occurred
Register INTR_MISC_EN_XY refers to two kinds of events, mainly for debug
purposes:
– Lane x has reached the CS_INIT state
– An error has occurred in the ILA alignment process on lane x
Table 27.
INTR_MOD settings
INTR_MOD_XY
Interrupt setting[1]
Nominal LMF
use[2]
000
DLP interrupt depends on lane 0
124
001
DLP interrupt depends on lane 1
124
010
DLP interrupt depends on lane 2
124
011
DLP interrupt depends on lane 3
124
100
DLP interrupt depends on lane 0 or lane 2
222
101
DLP interrupt depends on lane 0 or lane 1 or lane 2 or lane 3 421 / 422
110
HOLD_FLAG_CNT_EN_XY[3]
-
111
no interrupt
-


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