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TPS51117RGYTG4 Datasheet(PDF) 6 Page - Texas Instruments |
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TPS51117RGYTG4 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 31 page 2.9 3.9/3.6 48 TPS51117 SLVS631B – DECEMBER 2005 – REVISED SEPTEMBER 2009...................................................................................................................................... www.ti.com FUNCTIONAL BLOCK DIAGRAM DETAILED DESCRIPTION PWM OPERATION The main control loop of the TPS51117 is designed as an adaptive on-time pulse width modulation (PWM) controller. It supports proprietary D-CAP™ Mode that uses an internal compensation circuit and is suitable for minimal external component count configuration when an appropriate amount of ESR at the output capacitor(s) is allowed. Basic operation of D-CAP Mode can be described as follows. 6 Submit Documentation Feedback Copyright © 2005–2009, Texas Instruments Incorporated Product Folder Link(s) :TPS51117 |
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