Electronic Components Datasheet Search |
|
DS1832S Datasheet(PDF) 2 Page - Maxim Integrated Products |
|
DS1832S Datasheet(HTML) 2 Page - Maxim Integrated Products |
2 / 7 page DS1832 2 of 7 The second function the DS1832 performs is pushbutton reset control. The DS1832 debounces the pushbutton input and guarantees an active reset pulse width of 250 ms minimum. The third function is a watchdog timer. The DS1832 has an internal timer that forces the reset signals to the active state if the strobe input is not driven low prior to timeout. The watchdog timer function can be set to operate on timeout settings of approximately 150 ms, 600 ms, or 1.2 seconds. OPERATION - POWER MONITOR The DS1832 detects out-of-tolerance power supply conditions and warns a processor-based system of impending power failure. When VCC falls below a preset level as defined by TOL, the VCC comparator outputs the signals RST and RST . When TOL is connected to ground, the RST and RST signals become active as VCC falls below 2.98 volts. When TOL is connected to VCC, the RST and RST signals become active as VCC falls below 2.64 volts. The RST and RST are excellent control signals for a microprocessor, as processing is stopped at the last possible moments of valid VCC. On power-up, RST and RST are kept active for a minimum of 250 ms to allow the power supply and processor to stabilize. OPERATION - PUSHBUTTON RESET The DS1832 provides an input pin for direct connection to a pushbutton reset (see Figure 2). The pushbutton reset input requires an active low signal. Internally, this input is debounced and timed such that RST and RST signals of at least 250 ms minimum are generated. The 250 ms delay commences as the pushbutton reset input is released from the low level. OPERATION - WATCHDOG TIMER The watchdog timer function forces RST and RST signals active when the ST input is not clocked within the predetermined time period. The timeout period is determined by the condition of the TD pin. If TD is connected to ground the minimum watchdog timeout would be 62.5 ms, TD floating would yield a minimum timeout of 250 ms, and TD connected to VCC would provide a timeout of 500 ms minimum. Timeout of the watchdog starts when RST and RST become inactive. If a high-to-low transition occurs on the ST input pin prior to timeout, the watchdog timer is reset and begins to timeout again. If the watchdog timer is allowed to timeout, then the RST and RST signals are driven active for a minimum of 250 ms. The ST input can be derived from many microprocessor outputs. The most typical signals used are the microprocessor address signals, data signals or control signals. When the microprocessor functions normally, these signals would, as a matter of routine, cause the watchdog to be reset prior to timeout. To guarantee that the watchdog timer does not timeout, a high-to-low transition must occur at or less than the minimum times shown in Table 1. A typical circuit example is shown in Figure 4. The DS1832 watchdog function cannot be disabled. The watchdog strobe input must be strobed to avoid a watchdog timeout and reset. |
Similar Part No. - DS1832S |
|
Similar Description - DS1832S |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |