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TNY277PG Datasheet(PDF) 11 Page - Power Integrations, Inc.

Part # TNY277PG
Description  Energy-Effi cient, Off-Line Switcher With Enhanced Flexibility and Extended Power Range
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Manufacturer  POWERINT [Power Integrations, Inc.]
Direct Link  http://www.powerint.com
Logo POWERINT - Power Integrations, Inc.

TNY277PG Datasheet(HTML) 11 Page - Power Integrations, Inc.

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Rev. I 01/09
11
TNY274-280
www.powerint.com
the BP/M pin solder pad preventing the design from starting up.
Designs that make use of the undervoltage lockout feature by
connecting a resistor from the high voltage rail to the EN/UV pin
are not affected.
If the contamination levels in the PC board assembly facility are
unknown, the application is open frame or operates in a high
pollution degree environment and the design does not make
use of the undervoltage lockout feature, then an optional
390 kΩ resistor should be added from EN/UV pin to SOURCE
pin to ensure that the parasitic leakage current into the EN/UV
pin is well below 1 μA.
Note that typical values for surface insulation resistance (SIR)
where no-clean flux has been applied according to the
suppliers’ guidelines are >>10 MΩ and do not cause this issue.
Quick Design Checklist
As with any power supply design, all TinySwitch-III designs
should be verified on the bench to make sure that component
specifications are not exceeded under worst case conditions.
The following minimum set of tests is strongly recommended:
Maximum drain voltage – Verify that V
DS does not exceed
650 V at highest input voltage and peak (overload) output
power. The 50 V margin to the 700 V BV
DSS specification
gives margin for design variation.
1.
Figure 15.
Recommended Circuit Board Layout for TinySwitch-III with Undervoltage Lock Out Resistor.
TOP VIEW
PI-4368-042506
Opto-
coupler
+
-
HV
+
-
DC
OUT
Input Filter Capacitor
Output
Rectifier
Safety Spacing
T
r
a
n
s
f
o
r
m
e
r
PRI
SEC
BIAS
D
Output Filter
Capacitor
Maximize hatched copper
areas (
) for optimum
heatsinking
BP/M
EN/UV
Y1-
Capacitor
S
S
S
S
PRI
C
BP
BIAS
Maximum drain current – At maximum ambient temperature,
maximum input voltage and peak output (overload) power,
verify drain current waveforms for any signs of transformer
saturation and excessive leading edge current spikes at
startup. Repeat under steady state conditions and verify that
the leading edge current spike event is below I
LIMIT(Min) at the
end of the t
LEB(Min).
Under all conditions, the maximum drain
current should be below the specified absolute maximum
ratings.
Thermal Check – At specified maximum output power,
minimum input voltage and maximum ambient temperature,
verify that the temperature specifications are not exceeded
for TinySwitch-III, transformer, output diode, and output
capacitors. Enough thermal margin should be allowed for
part-to-part variation of the R
DS(ON) of TinySwitch-III as
specified in the data sheet. Under low line, maximum power,
a maximum TinySwitch-III SOURCE pin temperature of
110 °C is recommended to allow for these variations.
Design Tools
Up-to-date information on design tools is available at the Power
Integrations website: www.powerint.com.
2.
3.


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