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ADG1611BCPZ-REEL Datasheet(PDF) 9 Page - Analog Devices |
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ADG1611BCPZ-REEL Datasheet(HTML) 9 Page - Analog Devices |
9 / 16 page Data Sheet ADG1611/ADG1612/ADG1613 Rev. B | Page 9 of 16 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS 1 2 3 4 5 6 7 8 D1 S1 VSS D4 S4 GND IN1 IN4 16 15 14 13 12 11 10 9 D2 S2 VDD D3 IN3 S3 NC IN2 TOP VIEW (Not to Scale) ADG1611/ ADG1612/ ADG1613 NC = NO CONNECT Figure 4. 16-Lead TSSOP Pin Configuration PIN 1 INDICATOR 1 S1 2 VSS 3 GND 4 S4 11 VDD 12 S2 10 NC 9S3 TOP VIEW (Not to Scale) ADG1611/ ADG1612/ ADG1613 NOTES 1. NC = NO CONNECT. 2. EXPOSED PAD TIED TO SUBSTRATE, VSS. Figure 5. 16-Lead LFCSP Pin Configuration Table 7. Pin Function Descriptions Pin No. 16-Lead TSSOP 16-Lead LFCSP Mnemonic Description 1 15 IN1 Logic Control Input. 2 16 D1 Drain Terminal. This pin can be an input or output. 3 1 S1 Source Terminal. This pin can be an input or output. 4 2 VSS Most Negative Power Supply Potential. 5 3 GND Ground (0 V) Reference. 6 4 S4 Source Terminal. This pin can be an input or output. 7 5 D4 Drain Terminal. This pin can be an input or output. 8 6 IN4 Logic Control Input. 9 7 IN3 Logic Control Input. 10 8 D3 Drain Terminal. This pin can be an input or output. 11 9 S3 Source Terminal. This pin can be an input or output. 12 10 NC No Connection. 13 11 VDD Most Positive Power Supply Potential. 14 12 S2 Source Terminal. This pin can be an input or output. 15 13 D2 Drain Terminal. This pin can be an input or output. 16 14 IN2 Logic Control Input. Not applicable 17 (EPAD) EP (EPAD) Exposed Pad. Tied to substrate, VSS. Table 8. ADG1611/ADG1612 Truth Table ADG1611 INx ADG1612 INx Switch Condition 0 1 On 1 0 Off Table 9. ADG1613 Truth Table Logic (INx) Switch 1, Switch 4 Switch 2, Switch 3 0 Off On 1 On Off |
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