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ADuC848BSZ8-3 Datasheet(PDF) 11 Page - Analog Devices |
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ADuC848BSZ8-3 Datasheet(HTML) 11 Page - Analog Devices |
11 / 108 page Data Sheet ADuC845/ADuC847/ADuC848 Rev. C | Page 11 of 108 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS 52 51 50 49 48 43 42 41 40 47 46 45 44 14 15 16 17 18 19 20 21 22 23 24 25 26 1 2 3 4 5 6 7 8 9 10 11 13 12 PIN 1 IDENTIFIER TOP VIEW (Not to Scale) 39 38 37 36 35 34 33 32 31 30 29 28 27 P1.0/AIN1 P1.1/AIN2 P1.2/AIN3/REFIN2+ P1.3/AIN4/REFIN2– AVDD AGND REFIN– REFIN+ P1.4/AIN5 P1.5/AIN6 P1.6/AIN7/IEXC1 P1.7/AIN8/IEXC2 AINCOM/DAC P2.7/PWMCLK P2.6/PWM1 P2.5/PWM0 P2.4/T2EX DGND DVDD XTAL2 XTAL1 P2.3/SS/T2 P2.2/MISO P2.1/MOSI P2.0/SCLOCK (SPI) SDATA ADuC845/ADuC847/ADuC848 Figure 2. 52-Lead MQFP Pin Configuration P1.1/AIN2 P1.2/AIN3/REFIN2+ P1.3/AIN4/REFIN2– AGND AVDD AGND REFIN– REFIN+ P1.4/AIN5 P1.5/AIN6 P1.6/AIN7/IEXC1 P1.7/AIN8/IEXC2 AINCOM/DAC DAC P2.7/PWMCLK P2.6/PWM1 P2.5/PWM0 P2.4/T2EX DGND DGND DVDD XTAL1 P2.3/SS/T2 P2.2/MISO P2.1/MOSI P2.0/SCLOCK (SPI) SDATA 14 1 2 3 4 5 6 7 8 9 10 11 13 12 42 41 40 39 38 37 36 35 34 33 32 31 30 29 XTAL2 TOP VIEW (Not to Scale) ADuC845/ADuC847/ ADuC848 NOTES 1. THE EXPOSED PADDLE MUST BE LEFT UNCONNECTED. Figure 3. 56-Lead LFCSP Pin Configuration Table 3. Pin Function Descriptions Pin No: 52-MQFP Pin No: 56-LFCSP Mnemonic Type1 Description 1 56 P1.0/AIN1 I By power-on default, P1.0/AIN1 is configured as the AIN1 analog input. AIN1 can be used as a pseudo differential input when used with AINCOM or as the positive input of a fully differential pair when used with AIN2. P1.0 has no digital output driver. It can function as a digital input for which 0 must be written to the port bit. As a digital input, this pin must be driven high or low externally. 2 1 P1.1/AIN2 I On power-on default, P1.1/AIN2 is configured as the AIN2 analog input. AIN2 can be used as a pseudo differential input when used with AINCOM or as the negative input of a fully differential pair when used with AIN1. P1.1 has no digital output driver. It can function as a digital input for which 0 must be written to the port bit. As a digital input, this pin must be driven high or low externally. 3 2 P1.2/AIN3/REFIN2+ I On power-on default, P1.2/AIN3 is configured as the AIN3 analog input. AIN3 can be used as a pseudo differential input when used with AINCOM or as the positive input of a fully differential pair when used with AIN4. P1.2 has no digital output driver. It can function as a digital input for which 0 must be written to the port bit. As a digital input, this pin must be driven high or low externally. This pin also functions as a second external differential reference input, positive terminal. 4 3 P1.3/AIN4/REFIN2− I On power-on default, P1.3/AIN4 is configured as the AIN4 analog input. AIN4 can be used as a pseudo differential input when used with AINCOM or as the negative input of a fully differential pair when used with AIN3. P1.3 has no digital output driver. It can function as a digital input for which 0 must be written to the port bit. As a digital input, this pin must be driven high or low externally. This pin also functions as a second external differential reference input, negative terminal. 5 4 AVDD S Analog Supply Voltage. 6 5 AGND S Analog Ground. --- 6 AGND S A second analog ground is provided with the LFCSP version only. 7 7 REFIN− I External Differential Reference Input, Negative Terminal. 8 8 REFIN+ I External Differential Reference Input, Positive Terminal. Footnotes at end of table. |
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