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A3932 Datasheet(PDF) 10 Page - Allegro MicroSystems |
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A3932 Datasheet(HTML) 10 Page - Allegro MicroSystems |
10 / 12 page Three-Phase Power MOSFET Controller A3932 10 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com Applications Information Additionally, a 0.1 μF (or larger) decoupling capacitor should be connected between LCAP and AGND as close to the device terminals as possible. Protection Circuitry. The A3932 has several protection features: 1) Bootstrap Circuit. The bootstrap capacitor is charged whenever a low-side MOSFET is on, Sx output goes low, and the load current recirculates. This happens constantly during normal operation. The high-side MOSFET will not be allowed to turn on before the charging has decayed to less than approximately 9 mA. No fault will be registered. When a phase’s high-side driver is on for a long time (100% duty cycle operation) its charge pump is designed to maintain VGS > 9 V on the bridge FET if IGHx (the load on the gate driver) < 10 μA. 2) Hall Invalid. Illegal codes for the HALL inputs (000 or 111) will force a fault and coast the motor. Noisy Hall lines may cause double TACH pulses and, therefore, code errors that produce faults. Additional external pullup loading and filtering may be required depending on the system. 3) VREG Undervoltage. An internal regulator supplies the low-side gate driver and the bootstrap charge current. It is critical to ensure that VREG is at the proper level before enabling any of the outputs. The undervoltage circuit is active during power-up and will force a motor coast condition (all gate drives, GHx and GLx = 0) until VREG is greater than approximately 9.7 V. 4) Thermal Shutdown. A junction temperature greater than 165°C will signal a fault and coast the motor (all gate drives LOW). If the junction temperature then falls to less than 155°C (hysteresis), the fault will be cleared. 5) Motor Lead Shorted to Ground. The A3932 will signal a fault if a motor lead is shorted to ground. A short to ground is assumed after a high side is turned on and greater than 2 V is measured between the drain (VBB) and source (SA/SB/SC) of the high-side power MOSFET. This fault is cleared at the beginning of each commutation. If a stalled motor results from a fault, the fault can only be cleared by toggling the RESET terminal or by a power-up sequence. Synchronous Rectification. To reduce power dissipation in the external MOSFETs, the A3932 control logic turns on the appropriate low-side and high-side driver during the load-current recirculation, PWM-off cycle. Synchronous rectification allows current to flow through the MODE-selected MOSFET, rather than the body diode, during the decay time. The body diodes of the SR power MOSFETs will conduct only during the dead time required at each PWM transition. Dead Time. It is required to have a dead-time delay between a high- or low-side turn off and the next turn-on event to prevent cross conduction. The potential for cross conduction occurs with synchronous rectification, direction changes, PWM, or after a bootstrap capacitor charging cycle. The dead time is set by a resistor (Rdead) between the DEAD terminal and LCAP (+5 V) and can be set between 100 ns and 5.5 μs. The following equations are valid for Rdead between 5.6 kΩ and 470 kΩ. At 25°C, tdead (nom, ns) = 37 + (11.9 x 10-3 x (Rdead + 500)) For predicting worst case, over voltage and temperature extremes, tdead (min, ns) = 10 + (6.55 x 10-3 x (Rdead + 350)) tdead (max, ns) = 63 + (17.2 x 10-3 x (Rdead + 650)) For comparison with IDEAD test currents, IDEAD = (VLCAP – Vbe)/(Rdead + Rint) where (nominal values) VLCAP = 5 V, Vbe = 0.7 V at 25°C, and Rint = 500 Ω. Rather than use Rdead values near 470 kΩ, set DEAD = ground (VDEAD = 0 V), which activates an internal (IDEAD = 10 μA) current source. The choice of power MOSFET and external series gate resistance determines the selection of the dead-time resistor. The dead time should be made long enough to cover the variation of the MOSFET gate capacitance and series gate resistance (both external and internal to the A3932) tolerances. Decoupling. The internal reference, VREG, supplies current for the gate-drive circuit. As the gates are driven high they will require current from an external capacitor to support the transients. This capacitor should be placed as close as possible to the VREG terminal. Its value should be at least 20 times larger than the bootstrap capacitor. continued next page |
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