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A3992 Datasheet(PDF) 5 Page - Allegro MicroSystems |
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A3992 Datasheet(HTML) 5 Page - Allegro MicroSystems |
5 / 13 page ![]() DMOS Dual Full-Bridge Microstepping PWM Motor Driver A3992 5 Allegro MicroSystems, LLC 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com The A3992 is controlled via a 3 wire serial port. The programmable functions allow maximum flexibility in configuring the PWM to the motor drive requirements. The serial data is written as two 19 bit words, 1 bit to select which word (referred to here as Word 0 and Word 1) and 18 bits of data. The serial port is defined in the following tables and text descriptions. Word 0 Bit Assignments Word 0 is selected by setting D0 = 0. Assignments are summarized in the following table, and described in detail in the remainder of this section. Word 0 Bit Assignments Bit Function D0 Word Select = 0 D1 Bridge 1, DAC, LSB D2 Bridge 1, DAC, Bit2 D3 Bridge 1, DAC, Bit3 D4 Bridge 1, DAC, Bit4 D5 Bridge 1, DAC, Bit 5 D6 Bridge 1, DAC, MSB D7 Bridge 2, DAC, LSB D8 Bridge 2, DAC, Bit2 D9 Bridge 2, DAC, Bit3 D10 Bridge 2, DAC, Bit4 D11 Bridge 2, DAC, Bit 5 D12 Bridge 2, DAC, MSB D13 Bridge 1 Phase D14 Bridge 2 Phase D15 Bridge 1 Mode D16 Bridge 2 Mode D17 Reference Select D18 Range Select D1 – D6 Bridge 1, Linear DAC. 6 bit word to set de- sired current level for bridge 1. Setting all bits to zero disables Full Bridge 1, all drivers off. (See Current Regulation in the Functional Description section.) D7 – 12 Bridge 2 Linear DAC. 6 bit word to set the desired current level for bridge 2. Setting all bits to zero disables Full Bridge 2, all drivers off. (See Cur- rent Regulation in the Functional Description section.) D13 Bridge 1 Phase. This bit controls the direction of current for motor phase 1 as defined below: D13 OUT1A OUT1B 0L H 1H L D14 Bridge 2 Phase. This bit controls the direction of current for motor phase 2 as defined below: D14 OUT2A OUT2B 0L H 1H L D15 Bridge 1 Mode. This bit determines the decay for Full Bridge 1 as defined below: D15 Mode 0 Mixed Decay 1 Slow Decay D16 Bridge 2 Mode. This bit determines the decay for Full Bridge 2 as defined below: D16 Mode 0 Mixed Decay 1 Slow Decay D17 Ref Select. This bit determines the reference input for the two 6 bit linear DACs. Logic low selects internal 2 V reference voltage, logic high selects ex- ternal reference input on the REF pin. D18 Gm Range Select. D18 determines if the scaling factor used is 4 or 8: D18 Divider Load Current 0÷ 8 ITRIP = VDAC/(RSENSE × 8) 1÷ 4 ITRIP = VDAC/(RSENSE × 4) Serial Interface Description |
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