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UCC28500-12 Datasheet(PDF) 6 Page - Texas Instruments

Part # UCC28500-12
Description  BiCMOS PFC/PWM COMBINATION CONTROLLER
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

UCC28500-12 Datasheet(HTML) 6 Page - Texas Instruments

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UCC28500, UCC28501, UCC28502, UCC28503
UCC38500, UCC38501, UCC38502, UCC38503
SLUS419C − AUGUST 1999 − REVISED NOVEMBER 2001
6
www.ti.com
pin assignments
CAOUT: (current amplifier output) This is the output of a wide bandwidth operational amplifier that senses line
current and commands the PFC pulse width modulator (PWM) to force the correct duty cycle. This output can
swing close to GND, allowing the PWM to force zero duty cycle when necessary.
CT: (oscillator timing capacitor) A capacitor from CT to GND sets the oscillator frequency according to:
f
+
0.725
R
T
C
T
GND: (ground) All voltages measured with respect to ground. VCC and VREF should be bypassed directly to
GND with a 0.1-
µF or larger ceramic capacitor. The timing capacitor discharge current also returns to this pin,
so the lead from the oscillator timing capacitor to GND should be as short and direct as possible.
GT1: (gate drive) The output drive for the PFC stage is a totem pole MOSFET gate driver on GT1. Use a series
gate resistor of at least 10.5
Ω to prevent interaction between the gate impedance and the GT1 output driver
that might cause the GT1 to overshoot excessively. Some overshoot of the GT1 output is always expected when
driving a capacitive load. Refer to Figure 4 for gate drive resistor selections.
GT2: (gate drive) Same as output GT1 for the second stage output drive. Limited to 50% maximum duty cycle.
IAC: (input ac current) This input to the analog multiplier is a current. The multiplier is tailored for very low
distortion from this current input (IAC) to MOUT, so this is the only multiplier input which should be used for
sensing instantaneous line voltage. Recommended maximum IAC is 500 µA.
ISENSE1: (current sense) This is the non-inverting input to the current amplifier. This input and the inverting
input MOUT remain functional down to and below GND.
ISENSE2: (current sense) A resistor from the source of the lower FET to ground generates the input signal for
the peak limit control of the second stage. The oscillator ramp can also be summed into this pin, for slope
compensation.
MOUT: (multiplier output and current sense amplifier inverting input) The output of the analog multiplier and the
inverting input of the current amplifier are connected together at MOUT. As the multiplier output is a current, this
is a high impedance input so the amplifier can be configured as a differential amplifier to reject ground noise.
Multiplier output current is given by:
I
MOUT +
V
VAOUT *
1.0
I
IAC
K
V
VFF
2
Connect current loop compensation components between MOUT and CAOUT.
OVP/ENBL: (over-voltage/enable) A window comparator input which disables the PFC output driver if the boost
output is 6.67% above nominal or disables both the PFC and second stage output drivers and reset SS2 if pulled
below 1.9 V. This input is also used to determine the active range of the second stage PWM.
PKLMT: (PFC peak current limit) The threshold for peak limit is 0 V. Use a resistor divider from the negative side
of the current sense resistor to VREF to level-shift this signal to a voltage corresponding to the desired
overcurrent threshold across the current sense resistor.
PWRGND: Ground for totem pole output drivers.
RT: (oscillator charging current) A resistor from RT to GND is used to program oscillator charging current. A
resistor between 10 k
Ω and 100 kΩ is recommended. Nominal voltage on this pin is 3 V.


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