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HT56R644 Datasheet(PDF) 11 Page - Holtek Semiconductor Inc |
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HT56R644 Datasheet(HTML) 11 Page - Holtek Semiconductor Inc |
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11 / 145 page  Rev. 1.30 10 �a��� �� �013 Rev. 1.30 11 �a��� �� �013 HT56R62/HT56R65 HT56R642/HT56R644/HT56R654/HT56R656 TinyPowerTM A/D Type with LCD 8-Bit OTP MCU HT56R62/HT56R65 HT56R642/HT56R644/HT56R654/HT56R656 TinyPowerTM A/D Type with LCD 8-Bit OTP MCU Pin Description Thefollowingtabledepictsthepinscommontoalldevices. Pin Name I/O Configuration Option Description PA0/BZ PA1/BZ PA� PA3/PFD PA4 o� PA4/T�R1 o� PA4/T�R� PA5~PA7 I/O BZ/BZ PFD Bidi�e�tional 8-bit input/output po�t. Ea�� individual bit on t�is po�t �an be configured as a wake-up input using the PAWU register. Software instructions dete�mine if t�e pin is a C�OS output o� S��mitt t�igge� input. A pull-�ig� �esisto� �an be �onne�ted to ea�� pin using t�e PAPU �egiste�. Pins PA0� PA1 and PA3 a�e s�a�ed wit� BZ� BZ and PFD �espe�tively� t�e fun�tion of w�i�� is chosen via configuration option. Pins PA0~PA3 can also be setup as open drain pins using the MISC register. The HT56R642 has no shared pins with PA4. Pin PA4 is shared with TMR1 on the HT56R62 and with TMR2 on the HT56R65, HT56R654, HT56R656 and HT56R666. PB0/AN0~ PB7/AN7 o� PB0/AN0~ PB5/AN5 I/O — Bidi�e�tional 8-bit input/output po�t. Softwa�e inst�u�tions dete�mine if t�e pin is a C�OS output o� S��mitt t�igge� input. A pull-�ig� �esisto� �an be �onne�ted to ea�� pin using t�e PBPU �egiste�. PB is pin-s�a�ed wit� t�e A/D input pins. T�e A/D inputs a�e sele�ted via softwa�e inst�u�tions. On�e sele�ted as an A/D input� t�e I/O fun�tion and pull-�ig� �esisto� sele�tions a�e disabled automatically. HT56R62 has six PB pins, PB0/AN0~PB5/AN5 only. PD0/PW�0~ PD3/PW�3 PD4/INT0 PD5/INT1 PD�/T�R0 PD7/T�R1 I/O — Bidi�e�tional 8-bit input/output po�t. Softwa�e inst�u�tions dete�mine if t�e pin is a C�OS output o� S��mitt t�igge� input. A pull-�ig� �esisto� �an be �onne�ted to ea�� pin using t�e PDPU �egiste�. T�e PW� outputs� PW�0~PW�3� a�e pin s�a�ed wit� pins PD0~PD3� t�e fun�tion of w�i�� is chosen using the PWM registers. Pins PD4~PD7 are pin-shared with INT0, INT1, TMR0 and TMR1 respectively. HT56R62 has three PWM pins and PD7 is not available. OSC1 OSC� I O C�ystal o� RC o� EC OSC1� OSC� a�e �onne�ted to an exte�nal RC netwo�k o� exte�nal ��ystal� determined by configuration option, for the internal system clock. If the RC system �lo�k option is sele�ted� pin OSC� �an be used to measu�e t�e system �lo�k at 1/4 f�equen�y. EC is exte�nal �lo�k mode� we �an �onne�t OSC1 pin wit� exte�nal �lo�k sou��e di�e�tly. OSC3 OSC4 I O 32768Hz OSC3 and OSC4 are connected to a 32768Hz crystal oscillator to form a �eal time �lo�k fo� timing pu�poses and fo� fSUB o� fSL . This 32768Hz crystal is disabled/enabled by configuration option. VREF I — A/D �efe�en�e voltage input pin RES I — S��mitt T�igge� �eset input. A�tive low VDD — — Positive powe� supply VSS — — Negative power supply, ground AVDD — — Analog positive powe� supply AVSS — — Analog negative powe� supply� g�ound |
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