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TMS320C6474 Datasheet(PDF) 8 Page - Texas Instruments |
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TMS320C6474 Datasheet(HTML) 8 Page - Texas Instruments |
8 / 214 page TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com 2 Device Overview 2.1 Device Characteristics Table 2-1 provides an overview of the C6474 DSP. The tables show significant features of the C6474 device, including the capacity of on-chip RAM, the peripherals, the CPU frequency, and the package type with pin count. Table 2-1. Characteristics of the C6474 Processor HARDWARE FEATURES C6474 Peripherals DDR2 Memory Controller (32-bit bus width) [1.8 V I/O] 1 Not all peripherals pins (clock memory = DDRREFCLK(N|P) are available at the same EDMA3 (64 independent channels [CPU/3 clock rate] 1 time. High-speed 1x Serial RapidIO Port (2 lanes) 1 (For more detail, see Section 3, Device I2C 1 Configuration) McBSPs 2 (internal or external clock source up to 100 Mbps) 1000 Ethernet MAC (EMAC) 1 Management Data Input/Output (MDIO) 1 Antenna Interface (AIF) 1 Frame Synchronization (FSYNC) 1 64-bit Timers (Configurable) 6 64-bit or 12 32-bit (internal clock source CPU/6 clock frequency) SYSCLKOUT 1 General Purpose Input/Output Port (GPIO) 16 Decoder Coprocessors VCP2 (clock source = CPU/3 clock frequency) 1 TCP2 (clock source = CPU/3 clock frequency) 1 On-Chip Memory Size (Bytes) 3200 KB Organization 32KB L1P Program Cache (SRAM/Cache) 32KB L1D Data Cache (SRAM/Cache) 32KB Data Memory Controller 3072KB Total L2 Unified Memory SRAM/Cache 64KB L3 ROM CPU Megamodule Revision ID Register 0x0 Revision ID (MM_REVID. [15:0]) 0x0181 2000) JTAG Device_ID JTAG Register (address location: 0x0288 0814) For details, see Section 3.6 Frequency MHz 850 - 1200 (850 MHz to 1.2 GHz) Cycle Time ns 1.18 ns - 0.83 ns (850 MHz to 1.2 GHz CPU) Voltage Core (V) 0.9-V to 1.2-V SmartReflex(1) 1.1 V I/O (V) 1.8 V, 1.1 V PLL1 and PLL1 Controller CLKIN1 Frequency Multiplier Bypass (x1), (x4 to x32) Options PLL2 DDR Clock X10 BGA Package 23 X 23 mm 561-Pin Flip-Chip with BGA CUN/GUN/ZUN Process Technology μm 0.065 μm (1) A heatsink and implementation of the SmartReflex solution is required for proper device operation. For more details on SmartReflex, see Section 7.3.4. 8 Device Overview Copyright © 2008–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s) :TMS320C6474 |
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Similar Description - TMS320C6474_13 |
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