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VCBUC8168CCYG2 Datasheet(PDF) 3 Page - Texas Instruments |
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VCBUC8168CCYG2 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 327 page  TMS320DM8168, TMS320DM8167 TMS320DM8166, TMS320DM8165 www.ti.com SPRS614D – MARCH 2011 – REVISED JANUARY 2013 1.2 Applications • Video Encode, Decode, Transcode, and Transrate • Video Security • Video Conferencing • Video Infrastructure • Media Server • Digital Signage 1.3 Description The DM816x DaVinci™ Video Processors are a highly-integrated, programmable platform that leverages TI's DaVinci™ technology to meet the processing needs of the following applications: Video Encode, Decode, Transcode, and Transrate, Video Security, Video Conferencing, Video Infrastructure, Media Server, and Digital Signage. The device enables OEMs and ODMs to quickly bring to market devices featuring robust operating systems support, rich user interfaces, and high processing performance through the maximum flexibility of a fully integrated mixed processor solution. The device combines programmable video and audio processing with a highly-integrated peripheral set. Key to the device are up to three high-definition video and imaging coprocessors (HDVICP2). Each coprocessor can perform a single 1080p60 H.264 encode or decode or multiple lower resolution or frame rate encodes and decodes. Multichannel HD-to-HD or HD-to-SD transcoding along with multi-coding are also possible. With the ability to simultaneously process 1080p60 streams, the TMS320DM816x device is a powerful solution for today's demanding HD video application requirements. Programmability is provided by an ARM® Cortex™-A8 RISC CPU with NEON™ extension, TI C674x VLIW floating-point DSP core, and high-definition video and imaging coprocessors. The ARM® allows developers to keep control functions separate from ausio and video algorithms programmed on the DSP and coprocessors, thus reducing the complexity of the system software. The ARM® Cortex™-A8 32-bit RISC processor with NEON™ floating-point extension includes: 32K bytes (KB) of instruction cache; 32KB of data cache; 256KB of L2 cache; 48KB of Public ROM and 64KB of RAM. The rich peripheral set provides the ability to control external peripheral devices and communicate with external processors. For details on each of the peripherals, see the related sections in this document and the associated peripheral reference guides. The peripheral set includes: HD Video Processing Subsystem (HDVPSS), which provides output of simultaneous HD and SD analog video and dual HD video inputs; up to two Gigabit Ethernet MACs (10 Mbps,100, Mbps, 1000 Mbps) with GMII and MDIO interface; two USB ports with integrated 2.0 PHY; PCIe® port x2 lanes GEN2 compliant interface, which allows the device to act as a PCIe® root complex or device endpoint; one 6-channel McASP audio serial port (with DIT mode); two dual-channel McASP audio serial ports (with DIT mode); one McBSP multichannel buffered serial port; three UARTs with IrDA and CIR support; SPI serial interface; SD and SDIO serial interface; two I2C master and slave interfaces; up to 64 General-Purpose IO (GPIO); seven 32-bit timers; system watchdog timer; dual DDR2 and DDR3 SDRAM interface; flexible 8-bit and 16-bit asynchronous memory interface; and up to two SATA interfaces for external storage on two disk drives, or more with the use of a port multiplier. The device also includes an SGX530 3D graphics engine (available only on the DM8168 and DM8166 device) to enable sophisticated GUIs and compelling user interfaces and interactions. Additionally, it has a complete set of development tools for both the ARM and DSP which include C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a Microsoft ® Windows® debugger interface for visibility into source code execution. Copyright © 2011–2013, Texas Instruments Incorporated Device Summary 3 Submit Documentation Feedback Product Folder Links: TMS320DM8168 TMS320DM8167 TMS320DM8166 TMS320DM8165 |
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