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ACPL-K73L-000E Datasheet(PDF) 11 Page - AVAGO TECHNOLOGIES LIMITED

Part # ACPL-K73L-000E
Description  Single-channel and Dual-channel High Speed 15 MBd CMOS optocoupler with Glitch-Free Power-Up Feature
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Manufacturer  AVAGO [AVAGO TECHNOLOGIES LIMITED]
Direct Link  http://www.avagotech.com
Logo AVAGO - AVAGO TECHNOLOGIES LIMITED

ACPL-K73L-000E Datasheet(HTML) 11 Page - AVAGO TECHNOLOGIES LIMITED

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11
Powering Sequence
VDD needs to achieve a minimum level of 3V before pow-
ering up the output connecting component.
Input Limiting Resistor
ACPL-W70L and ACPL-K73L are direct current driven (Fig-
ure 8), and thus eliminate the need for input power supply.
To limit the amount of current flowing through the LED, it
is recommended that a 530ohm resistor is connected in
series with anode of LED (i.e. Pin 1 for ACPL-W70L, Pin 1
and P4 for ACPL-K73L) at 5V input signal. At 3.3V input
signal, it is recommended to connect 250ohm resistor in
series with anode of LED. The recommended limiting re-
sistors is based on the assumption that the driver output
impedence is 50Ω (as shown in Figure 11).
Figure 11. Connection of peaking capacitor (Cpeak) in parallel of the input
limiting resistor (Rllimit) to improve speed performance
GND 2
VDD2
0.1µF
GND1
Rlimit
SHIELD
Vi
+
-
Cpeak
VO
R drv =
50
Ω
Figure 12. Improvement of tp and PWD with added 100pF peaking capacitor
in parallel of input limiting resistor.
(i) VDD2=5V, Cpeak=100pF, Rlimit=530Ω
(ii) VDD2=3.3V, Cpeak=100pF, Rlimit=250Ω
0
5
10
15
20
25
30
35
-40
t
PLH
t
|PWD|
0
5
10
15
20
25
30
35
40
t
PHL
-20
0
20
40
60
80
100
-40
-20
0
20
40
60
80
100
With peaking cap
Without peaking cap
tPHL
tPLH
t
PLH
t
PHL
t
PLH
With peaking cap
Without peaking cap
|PWD|
PHL
0
5
10
15
20
25
30
35
-40
t
PLH
t
|PWD|
0
5
10
15
20
25
30
35
40
t
PHL
-20
0
20
40
60
80
100
-40
-20
0
20
40
60
80
100
With peaking cap
Without peaking cap
tPHL
tPLH
t
PLH
t
PHL
t
PLH
With peaking cap
Without peaking cap
|PWD|
PHL
Speed Improvement
A peaking capacitor can be placed across the input cur-
rent limit resistor (Figure 11) to achieve enhanced speed
performance. The value of the peaking cap is dependent
to the rise and fall time of the input signal and supply volt-
ages and LED input driving current (If). Figure 12 shows
significant improvement of propagation delay and pulse
with distortion with added 100pF peak capacitor at driv-
ing current of 6mA and 5V power supply.


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