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FM3540 Datasheet(PDF) 3 Page - Fairchild Semiconductor |
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FM3540 Datasheet(HTML) 3 Page - Fairchild Semiconductor |
3 / 10 page 3 www.fairchildsemi.com www.fairchildsemi.com FM3540/60 Rev. C Functional Description The FM3540/60 has two primary functional modes of operation and an additional mode for programming the device. Operational Modes During standard operation the device will either pass an address to the Y-Port from the I-Port or from an internally programmed value. At power up the device will default to passing the I-Port value to the Y-Port. The I-port values are generated from the motherboard of the system and may be hardwired or driven by another device. Pull- up resistors are provided on the device to accommodate this device being driven by open drain output drivers. The device expects standard CMOS input signals. The level of the output signal is determined by the Level input. If this input is connected to Vss/Ground, the output is at 2.5V on the multiplexed outputs (Y0-Y4). The non-multiplexed output is always at CMOS levels. The Level input, if left unconnected (it has an internal pullup), will cause the Y0-Y4 outputs to operate as open-drain outputs. The override# input, when set to 0, will cause all the outputs to be set to 0. The WP signal, if set to logic 1, will prevent data from being written to the non-volatile register. The mux_sel input, when set to logic 0, will select the data from the non-volatile register to drive on the Y0-4 outputs. If set to logic 1, the data from the inputs are selected instead. The non_mux_out latch is transparent when the mux_sel signal is at logic 0, and will latch data when the mux_select is in a logic 1 state. Output Port: Y0-Y4 The output port is an open drain output to allow for easy connec- tion to devices running at different voltage levels. The port is always active and either passes the value on the I-Port or the value in the Serial output port Register (SOPR). Changing the Mux Path is accomplished by writing to b7, b6 of the Serial Input Port Register. SOPR-b7, b6 defaults to a value of "10" at power up and the default path is from the I-Port through to the output port. The multiplexer only updates when an IIC stop condition is observed. Register Description The FM3540/60 has 3 registers in total. These registers are made up of a combination of read only, write only and read write bits. The two registers are listed below. Serial Output Port Register A(SOPRA) Address: 00H - A read/ write register that contains the new value to be written to output Port-Y and the multiplexer select bit. Serial Output Port Register B(SOPRB) Address: 01H - A read/ write register that contains the new value to be written to output Port-Y and the multiplexer select bit. Parallel Input Port Register (PIPR) Address: 02H - A read only register that is loaded with the 5 bit value of the I-Port. Serial Output Port Register (SOPR) (Address 000b and 001b) MXSB MXSA Data Field 0 0 I5 NMO I3 I2 I1 I0 b7 b6 b5 b4 b3 b2 B1 b0 b7-b6 - Multiplexer Select Bits (MXSB,MXSA) 00 - Multiplexer passes the SOPR(A). 01 - Multiplexer passer the SOPR(B). 10 - Multiplexer defaults to passing the I-Port Value. b5, b3-b0 - Data Field. New value to be output through the multiplexer. nmo - Non multiplexed output from internal non-volatile bit Parallel Input Port Register (PIPR) (Address 002b) Address Field Data Field 0 0 0 I4 I3I2I1 I0 b7 b6 b5 b4 b3 b2 B1 b0 b7-b5 - Address field. Value is always 000 b4-b0 - Data Field. Value is equal to the value on the I-Port. The external Port Register captures the value on the I-Port. Data is latched into this register on the first clock after a start condition is seen. This insures that a valid value will always be in this register if it is read. This register is a read only register with respect to the IIC port. Over- mux_ Non_ ride# sel MXSB MXSA mux_outputs mux_output 0 0 X X all 0's all 0's 0 1 X X Mux_inputs latched NMO (see note 1) 1 0 1 0 Mux_inputs latched NMO (see note 1) 1 0 0 0 From Non- From non- volatile reg- volatile reg- ister (SOPRA) ister (SOPRA) 1 0 1 1 Do not use this combination 1 0 0 1 From Non- From non- volatile reg- volatile reg- ister (SOPRB) ister (SOPRB) 1 1 Note 2 Note 1 Mux_inputs From Non- volatile reg- ister (SOPRA or SOPRB) Note 1: Latched NMO state will be the value present on the NMO output at the time of the mux_sel input transitioning from logic 0 to logic 1 state. Note 2: Output depends on previously selected state of MXSB and MXSA bits written to device. |
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