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ST10F276R-6QR3 Datasheet(PDF) 37 Page - STMicroelectronics

Part # ST10F276R-6QR3
Description  16-bit MCU with MAC unit 832 Kbyte Flash memory and 68 Kbyte RAM
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST10F276R-6QR3 Datasheet(HTML) 37 Page - STMicroelectronics

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ST10F276E
Internal Flash memory
Doc ID 12303 Rev 3
37/235
4.4
Protection strategy
The protection bits are stored in non-volatile Flash cells inside XFLASH module, that are
read once at reset and stored in 7 Volatile registers. Before they are read from the non-
volatile cells, all the available protections are forced active during reset.
The protections can be programmed using the Set Protection operation (see Flash Control
Registers paragraph), that can be executed from all the internal or external memories
except from the Flash Bank B2.
Two kind of protections are available: write protections to avoid unwanted writings and
access protections to avoid piracy. In next paragraphs all different level of protections are
shown, and architecture limitations are highlighted as well.
4.4.1
Protection registers
The seven non-volatile protection registers are one time programmable for the user.
Four registers (FNVWPXRL/H-FNVWPIRL/H) are used to store the Write Protection fuses
respectively for each sector of the XFLASH Module (see X) and IFLASH module (see I). The
other three Registers (FNVAPR0 and FNVAPR1L/H) are used to store the Access
Protection fuses (common to both Flash modules even though with some limitations).
4.4.2
Flash non-volatile write protection X register low
FNVWPXRL (0x0E DFB0)
NVR
Delivery value: FFFFh
15
14
13
12
11
10
98
765
43
210
W2PPR
Reserved
W2P2 W2P1W2P0
RW
RW
RW
RW
Table 19.
Flash non-volatile write protection X register low
Bit
Function
W2P(2:0)
Write Protection Bank 2 sectors 2-0 (XFLASH)
These bits, if programmed at 0, disable any write access to the sectors of Bank 2
(XFLASH).
W2PPR
Write Protection Bank 2 non-volatile cells
This bit, if programmed at 0, disables any write access to the non-volatile cells of Bank
2. Since these non-volatile cells are dedicated to Protection registers, once W2PPR bit
is set, the configuration of protection setting is frozen, and can only be modified
executing a Temporary Write Unprotection operation.


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