Electronic Components Datasheet Search |
|
TLK2501IRCPG4 Datasheet(PDF) 10 Page - Texas Instruments |
|
|
TLK2501IRCPG4 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 31 page TLK2501 1.5 TO 2.5 GBPS TRANSCEIVER SLLS427D − AUGUST 2000 − REVISED JULY 2003 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 detailed description (continued) serial-to-parallel Serial data is received on the DINRXP and DINRXN terminals. The interpolator and clock recovery circuit locks to the data stream if the clock to be recovered is within 200 PPM of the internally generated bit rate clock. The recovered clock is used to retime the input data stream. The serial data is then clocked into the serial-to-parallel shift registers. The 10-bit wide parallel data is then multiplexed and fed into two separate 8-bit/10-bit decoders where the data is then synchronized to the incoming data stream word boundary by detection of the K28.5 synchronization pattern. comma detect and 8-bit/10-bit decoding The TLK2501 has two parallel 8-bit/10-bit decode circuits. Each 8-bit/10-bit decoder converts 10 bit encoded data (half of the 20 bit received word) back into 8-bits. The comma detect circuit is designed to provide for byte synchronization to an 8-bit/10-bit transmission code. When parallel data is clocked into a parallel to serial converter, the byte boundary that was associated with the parallel data is now lost in the serialization of the data. When the serial data is received and converted to parallel format again, a way is needed to recognize the byte boundary. Generally this is accomplished through the use of a synchronization pattern. This is generally a unique pattern of 1s and 0s that either cannot occur as part of valid data or is a pattern that repeats at defined intervals. 8-bit/10-bit encoding contains a character called the comma (b0011111 or b1100000), which is used by the comma detect circuit on the TLK2501 to align the received serial data back to its original byte boundary. The decoder detects the K28.5 comma, generating a synchronization signal aligning the data to their 10-bit boundaries for decoding. It then converts the data back into 8-bit data, removing the control words. The output from the two decoders is latched into the 16-bit register synchronized to the recovered parallel data clock (RX_CLK) and output valid on the rising edge of the RX_CLK. It is possible for a single bit error in a data pattern to be interpreted as a comma on an erroneous boundary. If the erroneous comma is taken as the new byte boundary, all subsequent data is improperly decoded until a properly aligned comma is detected. To prevent a data bit error in a data packet from being interpreted as a comma, the comma word alignment circuit is turned off after receiving a properly aligned comma after the link is established. The link is established after three idle patterns or one valid data pattern is properly received. The comma alignment circuit is re-enabled when the synchronization state machine detects a loss of synchronization condition (see synchronization and initialization). Loss of synchronization occurs when four or more invalid words are received in a short period of time. Two output signals, RX_DV/LOS and RX_ER, are generated along with the decoded 16-bit data output on the RXD[0:15] terminals. The output status signals are asserted as shown in Table 2. When the TLK2501 decodes normal data and outputs the data on RXD[0:15], RX_DV/LOS is asserted (logic high) and RX_ER is deasserted (logic low). When the TLK2501 decodes a K23.7 code (F7F7) indicating carrier extend, RX_DV/LOS is deasserted and RX_ER is asserted. If the decoded data is not a valid 8-bit/10-bit code, an error is reported by the assertion of both RX_DV/LOS and RX_ER. If the error was due to an error propagation code, the RXD bits outputs hex FEFE. If the error was due to an invalid pattern, the data output on RXD is undefined. When the TLK2501 decodes an IDLE code, both RX_DV/LOS and RX_ER are deasserted and a K28.5 (BC) code followed by either a D5.6 (C5) or D16.2 (50) code are output on the RXD terminals. Table 2. Receive Status Signals RECEIVED 20 BIT DATA RX_DV/LOS RX_ER IDLE (< K28.5, D5.6 >, < K28.5, D16.2 >) 0 0 Carrier extend (K23.7, K23.7) 0 1 Normal data character (DX.Y) 1 0 Receive error propagation (K30.7, K30.7) 1 1 |
Similar Part No. - TLK2501IRCPG4 |
|
Similar Description - TLK2501IRCPG4 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |