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TMP175AIDRG4 Datasheet(PDF) 2 Page - Texas Instruments

Part # TMP175AIDRG4
Description  Digital Temperature Sensor with Two-Wire Interface
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TMP175AIDRG4 Datasheet(HTML) 2 Page - Texas Instruments

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TMP175
TMP75
SBOS288J − JANUARY 2004 − REVISED DECEMBER 2007
www.ti.com
2
ABSOLUTE MAXIMUM RATINGS(1)
Power Supply, V+
7.0V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Voltage(2)
−0.5V to 7.0V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Current
10mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Temperature Range
−55
°C to +127°C
. . . . . . . . . . . . . . .
Storage Temperature Range
−60
°C to +130°C
. . . . . . . . . . . . . . . . .
Junction Temperature (TJ max)
+150
°C
. . . . . . . . . . . . . . . . . . . . . .
ESD Rating:
Human Body Model (HBM)
4000V
. . . . . . . . . . . . . . . . . . . . . . .
Charged Device Model (CDM)
1000V
. . . . . . . . . . . . . . . . . . . .
Machine Model (MM)
300V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, and
functional operation of the device at these or any other conditions
beyond those specified is not supported.
(2) Input voltage rating applies to all TMP175 and TMP75 input
voltages.
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ORDERING INFORMATION(1)
PRODUCT
PACKAGE-LEAD
PACKAGE DESIGNATOR
PACKAGE MARKING
TMP175
SO-8
D
TMP175
TMP175
MSOP-8
DGK
DABQ
TMP75
SO-8
D
TMP75
TMP75
MSOP-8
DGK
T127
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website
at www.ti.com.
PIN ASSIGNMENTS
Top View
NOTE: Pin 1 is determined by orienting the package marking as indicated in the diagram.
SDA
SCL
ALERT
GND
V+
A0
A1
A2
1
2
3
4
8
7
6
5
SO−8
TMP175
SDA
SCL
ALERT
GND
V+
A0
A1
A2
1
2
3
4
8
7
6
5
MSOP−8
TMP75
SDA
SCL
ALERT
GND
V+
A0
A1
A2
1
2
3
4
8
7
6
5
SO−8
TMP75
SDA
SCL
ALERT
GND
V+
A0
A1
A2
1
2
3
4
8
7
6
5
MSOP−8
TMP175


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