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LMC6772BIM Datasheet(PDF) 4 Page - Texas Instruments |
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LMC6772BIM Datasheet(HTML) 4 Page - Texas Instruments |
4 / 25 page LMC6772 SNOS749F – SEPTEMBER 1995 – REVISED MARCH 2013 www.ti.com 5.0V and 15.0V Electrical Characteristics Unless otherwise specified, all limits ensured for TJ = 25°C, V + = 5.0V and 15.0V, V− = 0V, V CM = V +/2. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Typ(1) LMC6772AI LMC6772BI LMC6772Q Units Limit(2) Limit(2) Limit(2) VOS Input Offset Voltage 3 5 15 10 mV 8 18 13 max TCVOS Input Offset Voltage Temperature V+ = 5V 2.0 μV/°C Drift V+ = 15V 4.0 Input Offset Voltage Average V+ = 5V(3) 3.3 μV/Mont Drift h V+ = 15V(3) 4.0 IB Input Current V = 5V 0.04 pA IOS Input Offset Current V+ = 5V 0.02 pA CMRR Common Mode Rejection Ratio V+ = 5V 75 dB V+ = 15V 82 PSRR Power Supply Rejection Ratio ±2.5V < VS < ±5V 80 dB AV Voltage Gain (By Design) 100 dB VCM Input Common-Mode Voltage V+ = 5.0V 5.3 5.2 5.2 5.2 V Range CMRR > 55 dB 5.0 5.0 5.0 min −0.3 −0.2 −0.2 −0.2 Vmax 0.0 0.0 0.0 V+ = 15.0V 15.3 15.2 15.2 15.2 V CMRR > 55 dB 15.0 15.0 15.0 min −0.3 −0.2 −0.2 −0.2 V 0.0 0.0 0.0 max VOL Output Voltage Low V+ = 5V 0.2 0.4 0.4 0.4 V ILOAD = 5 mA 0.55 0.55 0.55 max V+ = 15V 0.2 0.4 0.4 0.4 V ILOAD = 5 mA 0.55 0.55 0.55 max IS Supply Current For Both Comparators 12 20 20 20 μA (Output Low) 25 25 25 max ISC Short Circuit Current V+ = 15V, Sinking, VO = 45 mA 12V(4) (1) Typical Values represent the most likely parametric norm. (2) All limits are specified by testing or statistical analysis. (3) Input offset voltage Average Drift is calculated by dividing the accelerated operating life drift average by the equivalent operational time. The input offset voltage average drift represents the input offset voltage change at worst-case input conditions. (4) Do not short circuit output to V+, when V+ is > 12V or reliability will be adversely affected. 4 Submit Documentation Feedback Copyright © 1995–2013, Texas Instruments Incorporated Product Folder Links: LMC6772 |
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