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T8T Datasheet(PDF) 5 Page - STMicroelectronics |
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T8T Datasheet(HTML) 5 Page - STMicroelectronics |
5 / 9 page T8T Characteristics Doc ID 16192 Rev 3 5/9 Figure 7. Non repetitive surge peak on-state current for a sinusoidal Figure 8. Relative variation of gate trigger current and gate trigger voltage versus junction temperature ITSM(A), I²t (A²s) 10 100 1000 0.01 0.10 1.00 10.00 10 100 1000 0.01 0.10 1.00 10.00 dl /dt limitation: 50 A / µs I²t ITSM Tj initial = 25 °C tp(ms) pulse with width t <10 ms, and corresponding value of I²t p IGT,VGT[Tj] / IGT,VGT[Tj = 25 °C] 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -50 -25 0 25 50 75 100 125 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -50 -25 0 25 50 75 100 125 Tj(°C) IGT Q3 IGT Q1-Q2 IGT Q1-Q2-Q3 typical values Figure 9. Relative variation of holding current and latching current versus junction temperature Figure 10. Relative variation of static dV/dt immunity versus junction temperature IH,[Tj] / IH,IL[Tj = 25 °C] IL 0.0 0.5 1.0 1.5 2.0 -50 -25 0 25 50 75 100 125 0.0 0.5 1.0 1.5 2.0 -50 -25 0 25 50 75 100 125 Tj(°C) IL IH typical values dV / dt [Tj] / [Tj = 125 °C] dV / dt 0 1 2 3 4 5 6 7 25 50 75 100 125 VD =VR = 402 V Tj(°C) Figure 11. Relative variation of critical rate of decrease of main current versus junction temperature Figure 12. Relative variation of leakage current versus junction temperature (dl / dt)c [Tj] / [Tj = 125 °C] (dl / dt)c 0 1 2 3 4 5 6 25 50 75 100 125 Tj(°C) IDRM/IRRM [Tj;VDRM /VRRM] / IDRM/IRRM [Tj = 125 °C; 600 V] 1.0E-03 1.0E-02 1.0E-01 1.0E+00 25 50 75 100 125 Tj(°C) VDRM =VRRM = 600 V VDRM =VRRM = 400 V VDRM =VRRM = 200 V for different values of blocking voltage |
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