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TE28F640J3D75 Datasheet(PDF) 5 Page - Intel Corporation |
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TE28F640J3D75 Datasheet(HTML) 5 Page - Intel Corporation |
5 / 68 page November 2007 Datasheet 308551-05 5 Numonyx™ Embedded Flash Memory (J3 v. D) Revision History Date Revision Description July 2005 001 Initial release September 2005 002 Changed Marketing name from 28FxxxJ3 to J3 v. D. Updated the following: • Table 18, “Command Bus Operations” on page 35 • Section 9.2.2, “Read Status Register” on page 38 • Section 9.3.2, “Buffered Programming” on page 39 • Table 24, “Valid Commands During Suspend” on page 41 Added Table 25, “STS Configuration Register” on page 42. February 2006 003 Section 5.3.1, “Power-Up/Down Characteristics” on page 20 was modified. Notes on Table 8, “DC Voltage Characteristics” on page 22 were updated Table 10, “Read Operations” on page 23 was updated with R16 value Table 12, “Configuration Performance” on page 29 was updated Note 1 of Table 26, “STS Configuration Coding Definitions” on page 43 was updated. February 2007 004 Added 256-Mbit; Updated format. November 2007 05 Applied Numonyx branding. |
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