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MAX3996CTP-T Datasheet(PDF) 3 Page - KOA Speer Electronics, Inc. |
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MAX3996CTP-T Datasheet(HTML) 3 Page - KOA Speer Electronics, Inc. |
3 / 16 page 3.0V to 5.5V, 2.5Gbps VCSEL and Laser Driver _______________________________________________________________________________________ 3 ELECTRICAL CHARACTERISTICS (continued) (VCC = 3.0V to 5.5V, TA = 0°C to +70°C, unless otherwise noted. Typical values are at VCC = 3.3V, TC pin not connected, TA = +25°C.) (Figure 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Minimum Modulation Current iMOD 2 mAP-P Maximum Modulation Current iMOD RL ≤ 25Ω 30 40 mAP-P Accuracy of Modulation Current (Part-to-Part Variation) RMODSET = 2.37k Ω (iMOD ≈ 30mAP-P into 25Ω) -10 +10 % iMOD = 5mA into 25 Ω, 20% to 80% (Note 3) 54 100 iMOD = 10mA into 25 Ω, 20% to 80% (Note 3) 55 125 Edge Transition Time tr, tf iMOD = 30mA into 25 Ω, 20% to 80% (Note 3) 65 130 ps iMOD = 5mA into 25 Ω (Notes 2, 3) 17 35 iMOD = 10mA into 25 Ω (Notes 2, 3) 14 22 Deterministic Jitter iMOD = 30mA into 25 Ω (Notes 2, 3) 9 20 psP-P Random Jitter (Note 3) 2 8 psRMS Modulation Current During Fault iMOD_OFF 15 200 µAP-P Tempco = MAX, RMOD = open 4000 Modulation Current Tempco Tempco = MIN, RTC = open 50 ppm/°C Input Resistance RIN Differential 85 115 Ω Output Resistance ROUT Single ended; outputs to VCC 42 50 58 Ω Input Common-Mode Voltage VCC - 0.3 V SAFETY FEATURES (See Typical Operating Characteristics) MODSET and TC Pin Fault Threshold 200 mV BIAS Pin Fault Threshold A fault will be triggered if VBIAS is less than this voltage 300 400 mV Excessive Bias Current Fault A fault will be triggered if VMON2 exceeds this voltage 400 440 mV TX Disable Time t_off Time from rising edge of TX_DISABLE to IBIAS = IBIAS_OFF and iMOD = iMOD_OFF (Note 3) 0.06 5µs TX Disable Negate Time t_on Time from falling edge of TX_DISABLE to IBIAS and iMOD at 95% of steady state (Note 3) 37 500 µs Reset Initialization Time t_init From power ON or negation of FAULT using TX_DISABLE. Time to set FAULT = low, iMOD = 95% of steady state and IBIAS = 95% of steady state (Note 3) 23 200 ms Fault Assert Time t_fault Time from fault to FAULT = high, CFAULT < 20pF, RFAULT = 4.7k Ω (Note 3) 14 50 µs TX_DISABLE Reset t_reset Time TX_DISABLE must be held high to reset FAULT (Note 3) 0.01 1µs Note 1: Supply current excludes bias and modulation currents. Note 2: Deterministic jitter is the peak-to-peak deviation from the ideal time crossings measured with a K28.5 bit pattern 00111110101100000101. Note 3: AC characteristics guaranteed by design and characterization. |
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