SN74CBTD16210

20-BIT FET BUS SWITCH

WITH LEVEL SHIFTING

SCDS049H – MARCH 1998 – REVISED JULY 2002

2

POST OFFICE BOX 655303

logic diagram (positive logic)

1A1

1A10

1OE

1B1

1B10

2A1

2A10

2OE

2B1

2B10

2

12

48

13

24

47

46

36

35

25

–0.5 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–0.5 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous channel current

128 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance,

70

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DGV package

58

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DL package

63

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–65

°C to 150°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES:

1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51-7.

recommended operating conditions (see Note 3)

MIN

MAX

UNIT

VCC

Supply voltage

4.5

5.5

V

VIH

High-level control input voltage

2

V

VIL

Low-level control input voltage

0.8

V

TA

Operating free-air temperature

–40

85

°C

In applications with fast edge rates, multiple outputs switching, and operating at high frequencies, the output may have little or no level-shifting

effect.

NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.