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ADP170AUJZ-1.2-R7 Datasheet(PDF) 4 Page - Analog Devices

Part # ADP170AUJZ-1.2-R7
Description  300 mA, Low Quiescent Current, CMOS Linear Regulators
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADP170AUJZ-1.2-R7 Datasheet(HTML) 4 Page - Analog Devices

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ADP170/ADP171
Rev. B | Page 4 of 20
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
OUTPUT NOISE
OUTNOISE
10 Hz to 100 kHz, VIN = 3.6 V, VOUT = 3.0 V
72
μV rms
10 Hz to 100 kHz, VIN = 3.6 V, VOUT = 1.8 V
50
μV rms
10 Hz to 100 kHz, VIN = 3.6 V, VOUT = 1.2 V
40
μV rms
10 Hz to 100 kHz, VIN = 3.6 V, VOUT = 0.8 V
30
μV rms
POWER SUPPLY REJECTION RATIO
PSRR
1 kHz, VIN = 3.6 V, IOUT = 10 mA, VOUT = 0.8 V
73
dB
10 kHz, VIN = 3.6 V, IOUT = 10 mA, VOUT = 0.8 V
70
dB
10 kHz, VIN = (VOUT + 1 V), IOUT = 10 mA to 300 mA
50
dB
100 kHz, VIN = (VOUT + 1 V), IOUT = 10 mA to 300 mA
47
dB
1 The current from the external resistor divider network in the case of adjustable voltage output (as with the ADP171) should be subtracted from the ground current measured.
2 Accuracy when VOUT is connected directly to ADJ. When the VOUT voltage is set by external feedback resistors, the absolute accuracy in adjust mode depends on the
tolerances of resistors used.
3 Based on an end-point calculation using 1 mA and 300 mA loads. See
for typical load regulation performance for loads less than 1 mA.
Figure 6
4 Applies only for output voltages above 1.6 V. Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal
output voltage.
5 Start-up time is defined as the time between the rising edge of EN and VOUT being at 90% of its nominal value.
6 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V, or 2.7 V.
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS
Table 2.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
MINIMUM INPUT AND OUTPUT
CAPACITANCE1
CMIN
TJ = −40°C to +125°C
0.45
μF
CAPACITOR ESR
RESR
TJ = −40°C to +125°C
0.001
1
Ω
1 The minimum input and output capacitance should be greater than 0.45 μF over the full range of operating conditions. The full range of operating conditions in the
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;
Y5V and Z5U capacitors are not recommended for use with any LDO.


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