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TPS2482PWR Datasheet(PDF) 9 Page - Texas Instruments |
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TPS2482PWR Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 56 page  J(max) S(max) LIM JC(max) T T P R q - < ( ) LIM PROG LIM P V 10 I = ´ TPS2482 TPS2483 www.ti.com SLUSAW1 A – DECEMBER 2012 – REVISED MARCH 2013 Pin Function Detailed Descriptions A0, A1: Address bits for setting the TPS2482 and TPS2483 serial-bus address. Each input may be tied to one of four pins (GND, SDA, SCL, VS) which provides a total of 16 different available addresses, as shown in Table 8. ALERT: The ALERT pin is associated with the serial bus, similar to the SMBus Alert function. ALERT is an open- drain multi-function logic signal that can be programmed to go low if a user-defined threshold has been exceeded. EN: The GATE driver is enabled when the internal POR2 and UVLO thresholds have been satisfied and the EN upper threshold is exceeded. Hysteresis between the upper and lower thresholds of EN helps to avoid enable/disable chatter if a slowly changing voltage is applied. EN can be used as a logic-level control input, an analog input voltage monitor as illustrated by REN1/REN2 in the Simplified Application Diagram, or it can be tied to VCC to always enable the TPS2482 and TPS2483. The hysteresis associated with the internal comparator makes this a stable method of detecting a low input voltage condition and shutting off the downstream circuit(s). A TPS2482 that has latched off can be reset by cycling EN below its lower threshold and back high. GATE: Provides the high-side (above VCC) gate drive for the external N-channel MOSFET pass-transistor (pass-MOSFET). It is controlled by the internal gate drive amplifier, which provides a pull-up current of 22 μA from an internal charge pump and a strong pull-down to ground of at least 75 mA. The pull-down current is a non-linear function of the amplifier overdrive; it provides less drive for small overloads, but higher overdrive for fast reaction to an output short-circuit. There is a separate pull-down of about 2.4 mA to shut off the pass- MOSFET when either EN or UVLO fall below their respective lower thresholds. An internal clamp protects the gate of the pass-MOSFET (to OUT) and generally eliminates the need for an external clamp in almost all cases for devices with a VGS(max) rating ≥ 20 V; an external Zener diode may be required to protect the gate of high-CGD devices with VGS(max) < 16 V. A small series resistance of 10 Ω should be inserted in the gate lead if the CISS of the pass-MOSFET > 200 pF, otherwise use 33 Ω for small MOSFETs. A capacitor can be connected from GATE to ground to create a slower inrush with a constant current profile without affecting the amplifier stability. Add a series resistor of about 1 k Ω to the gate capacitor to maintain the gate clamping and current limit response time. GND: These pins are connected to the system ground. OUT: This pin is an input used by the constant power-limit engine and the PG comparator to measure VDS of the pass-MOSFET as V(SENSE-OUT). Internal protection circuits leak a small current from this pin when it is low. If the load circuit can drive OUT below ground, connect a clamp (or freewheel) diode from OUT (cathode) to GND (anode) to keep VOUT > -0.3 V. PG: This open-drain output is intended to interface to downstream dc/dc converters or monitoring circuits to provide a "power-good" indication when load capacitor charge-up is essentially complete. PG goes open-drain (high voltage with a pull-up) after VDS of the pass-MOSFET has fallen below 1.25 V and a 9-ms deglitch time period has elapsed. PG is false (low or low-resistance to ground) whenever VDS of the pass-MOSFET is above 2.7 V or UVLO is active. PG can also be viewed as having an input and output voltage monitor function. The 9- ms deglitch circuit serves to filter short events that could cause PG to go inactive (low) such as a momentary overload or input voltage step. However, the 9-ms delay is immediately reset whenever UVLO is active. VPG can be greater than VVCC because its ESD protection is only with respect to ground. PROG: The voltage applied to this pin (normally 0.4 V to 4.0 V) programs the power dissipation limit for the pass-MOSFET by the constant power-limit engine. Applying a voltage lower than 0.4 V may result in wide variations in power-limiting performance. Typically, a resistor divider RPROG1/RPROG2 is connected from VREF to PROG to set the power limit according to the following equation: (1) where PLIM is the desired power dissipation limit for the pass-MOSFET and ILIM is the current limit setpoint (see SENSE). PLIM is determined by the allowable thermal stress on the pass-MOSFET: (2) Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: TPS2482 TPS2483 |
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