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ADS5295IPFP Datasheet(PDF) 6 Page - Texas Instruments |
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ADS5295IPFP Datasheet(HTML) 6 Page - Texas Instruments |
6 / 91 page ADS5295 SBAS595 – DECEMBER 2012 www.ti.com DIGITAL CHARACTERISTICS The dc specifications refer to the condition where the digital outputs are not switching, but are permanently at a valid logic level '0' or '1'. AVDD = 1.8 V and DRVDD = 1.8 V. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DIGITAL INPUTS (RESET, SCLK, SDATA, CS, SYNC, PDN) All pins support 1.8-V and 3.3-V CMOS VIH High-level input voltage 1.3 V logic levels All pins support 1.8-V and 3.3-V CMOS VIL Low-level input voltage 0.4 V logic levels IIH High-level input current CS, SDATA, SCLK(1) VHIGH = 1.8 V 6 µA IIL Low-level input current CS, SDATA, SCLK(1) VLOW = 0 V 0.1 µA DIGITAL OUTPUTS (CMOS INTERFACE: SDOUT) VOH High-level output voltage AVDD – 0.1 V VOL Low-level output voltage 0.1 V DIGITAL OUTPUTS (LVDS INTERFACE: OUT1A_P, OUT1A_N to OUT8A_P, OUT8A_N and OUT1B_P, OUT1B_N to OUT8B_P, OUT8B_N) VODH High-level output differential voltage(2) 300 485 mV VODL Low-level output differential voltage(2) -485 -300 mV VOCM Output common-mode voltage 0.95 1.35 V (1) CS, SDATA, and SCLK have an internal 220-k Ω pull-down resistor. (2) With an external 100- Ω termination. 6 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: ADS5295 |
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