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TLK105 Datasheet(PDF) 4 Page - Texas Instruments |
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TLK105 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 99 page 32 9 31 10 30 11 29 12 28 13 27 14 26 15 25 16 24 1 23 2 22 3 21 4 20 5 19 6 18 7 17 8 GND PFBIN2 RXD_3 / PHYAD4 XI XO VDD33_IO MDC MDIO RESET LED_LINK / AN_0 TX_CLK TX_EN TXD_0 TXD_1 TXD_2 TXD_3 INT PWDN / TLK105 TLK106 SLLSEB8A – AUGUST 2012 – REVISED MARCH 2013 www.ti.com 2 Pin Descriptions The TLK10x pins fall into the following interface categories (subsequent sections describe each interface): • Serial Management Interface • Reset and Power Down • MAC Data Interface • Bootstrap Configuration Inputs • Clock Interface • 10/100Mbs PMD Interface • LED Interface • Special Connect Pins • Power and Ground pins Note: Configuration pin option. See Section 3.1 for Jumper Definitions. The definitions below define the functionality of each pin. Type: I Input Type: O Output Type: I/O Input/Output Type: OD Open Drain Type: PD, PU Internal Pulldown/Pullup Type: S Configuration Pin (All configuration pins have weak internal pullups or pulldowns. Use an external 2.2k Ω resistor if you need a different default value. See Section 3.1 for details.) 2.1 Pin Layout Figure 2-1. TLK10x PIN DIAGRAM, TOP VIEW 4 Pin Descriptions Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TLK105 TLK106 |
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