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STM8S003F3T6TR Datasheet(PDF) 33 Page - STMicroelectronics |
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STM8S003F3T6TR Datasheet(HTML) 33 Page - STMicroelectronics |
33 / 100 page Reset status Register name Register label Block Address 0x00 TIM1 capture/compare register 1 high TIM1_CCR1H 0x00 5265 0x00 TIM1 capture/compare register 1 low TIM1_CCR1L 0x00 5266 0x00 TIM1 capture/compare register 2 high TIM1_CCR2H 0x00 5267 0x00 TIM1 capture/compare register 2 low TIM1_CCR2L 0x00 5268 0x00 TIM1 capture/compare register 3 high TIM1_CCR3H 0x00 5269 0x00 TIM1 capture/compare register 3 low TIM1_CCR3L 0x00 526A 0x00 TIM1 capture/compare register 4 high TIM1_CCR4H 0x00 526B 0x00 TIM1 capture/compare register 4 low TIM1_CCR4L 0x00 526C 0x00 TIM1 break register TIM1_BKR 0x00 526D 0x00 TIM1 dead-time register TIM1_DTR 0x00 526E 0x00 TIM1 output idle state register TIM1_OISR 0x00 526F Reserved area (147 bytes) 0x00 5270 to 0x00 52FF 0x00 TIM2 control register 1 TIM2_CR1 TIM2 0x00 5300 Reserved 0x00 5301 Reserved 0x00 5302 0x00 TIM2 Interrupt enable register TIM2_IER 0x00 5303 0x00 TIM2 status register 1 TIM2_SR1 0x00 5304 0x00 TIM2 status register 2 TIM2_SR2 0x00 5305 0x00 TIM2 event generation register TIM2_EGR 0x00 5306 33/100 DocID018576 Rev 3 Memory and register map STM8S003K3 STM8S003F3 |
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