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STM8S003F3P6C Datasheet(PDF) 9 Page - STMicroelectronics |
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STM8S003F3P6C Datasheet(HTML) 9 Page - STMicroelectronics |
9 / 100 page Block diagram 3 Figure 1: Block diagram XTAL 1-16 MHz RC int. 16 MHz RC int. 128 kHz STM8 core Debug/SWIM SPI UART1 16-bit general purpose AWU timer Reset block Reset POR BOR Clock controller Detector Clock to peripherals and core 8 Mbit/s LIN master Window WDG 8-Kbyte 1-Kbyte ADC1 4 CAPCOM Reset 400 Kbit/s Single wire debug interf. SPI emul. channels +3 program Flash 16-bit advanced control timer (TIM1) 8-bit basic timer RAM Up to Beeper 1/2/4 kHz beep Independent WDG (TIM4) 3 CAPCOM channels Up to complementary outputs timer (TIM2) Up to 5 channels I2C 128-byte data EEPROM 9/100 DocID018576 Rev 3 Block diagram STM8S003K3 STM8S003F3 |
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