1

FEATURES

DB, DBQ, DGV, DW, OR PW PACKAGE

(TOP VIEW)

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

A0

A1

A2

P0

P1

P2

P3

GND

SDA

SCL

INT

P7

P6

P5

P4

RGV PACKAGE

(TOP VIEW)

16

6

8

2

10

P7

4

3

1

7

5

12

11

9

13

14

15

P6

INT

SCL

A2

P0

P1

P2

RGT PACKAGE

(TOP VIEW)

16

6

8

2

10

P7

4

3

1

7

5

12

11

9

13

14

15

P6

INT

SCL

A2

P0

P1

P2

DESCRIPTION/ORDERING INFORMATION

PCA9554

WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS

• Power-Up With All Channels Configured as

Inputs

• Open-Drain Active-Low Interrupt Output

• No Glitch On Power Up

• Operating Power-Supply Voltage Range of

2.3 V to 5.5 V

• Latched Outputs With High-Current Drive

Maximum Capability for Directly Driving LEDs

• 5-V Tolerant I/Os

• Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

• Three Hardware Address Pins Allow up to

• ESD Protection Exceeds JESD 22

–

2000-V Human-Body Model (A114-A)

• Input/Output Configuration Register

–

200-V Machine Model (A115-A)

• Polarity Inversion Register

–

1000-V Charged-Device Model (C101)

• Internal Power-On Reset

(SCL), serial data (SDA)].

The PCA9554 consists of one 8-bit Configuration (input or output selection), Input, Output, and Polarity Inversion

However, the system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration

bits. The data for each input or output is kept in the corresponding Input or Output register. The polarity of the

Input Port register can be inverted with the Polarity Inversion register. All registers can be read by the system

master.

The system master can reset the PCA9554 in the event of a timeout or other improper operation by utilizing the

The PCA9554 open-drain interrupt (INT) output is activated when any input state differs from its corresponding

Input Port register state and is used to indicate to the system master that an input state has changed.

INT can be connected to the interrupt input of a microcontroller. By sending an interrupt signal on this line, the

remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

UNLESS

OTHERWISE

NOTED

this

document

contains

Copyright © 2006–2008, Texas Instruments Incorporated

PRODUCTION DATA information current as of publication date.

Products conform to specifications per the terms of Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Not Recommended for New Designs